Index: src/compiler/mips/instruction-selector-mips.cc |
diff --git a/src/compiler/mips/instruction-selector-mips.cc b/src/compiler/mips/instruction-selector-mips.cc |
index d4b68e4ab25e25bb14d04bc3e1419dc022905871..efcec0c8f109dab5f57d200dadb5ac630af46985 100644 |
--- a/src/compiler/mips/instruction-selector-mips.cc |
+++ b/src/compiler/mips/instruction-selector-mips.cc |
@@ -764,32 +764,10 @@ void InstructionSelector::VisitFloat32Sub(Node* node) { |
VisitRRR(this, kMipsSubS, node); |
} |
-void InstructionSelector::VisitFloat32SubPreserveNan(Node* node) { |
- VisitRRR(this, kMipsSubPreserveNanS, node); |
-} |
- |
void InstructionSelector::VisitFloat64Sub(Node* node) { |
- MipsOperandGenerator g(this); |
- Float64BinopMatcher m(node); |
- if (m.left().IsMinusZero() && m.right().IsFloat64RoundDown() && |
- CanCover(m.node(), m.right().node())) { |
- if (m.right().InputAt(0)->opcode() == IrOpcode::kFloat64Sub && |
- CanCover(m.right().node(), m.right().InputAt(0))) { |
- Float64BinopMatcher mright0(m.right().InputAt(0)); |
- if (mright0.left().IsMinusZero()) { |
- Emit(kMipsFloat64RoundUp, g.DefineAsRegister(node), |
- g.UseRegister(mright0.right().node())); |
- return; |
- } |
- } |
- } |
VisitRRR(this, kMipsSubD, node); |
} |
-void InstructionSelector::VisitFloat64SubPreserveNan(Node* node) { |
- VisitRRR(this, kMipsSubPreserveNanD, node); |
-} |
- |
void InstructionSelector::VisitFloat32Mul(Node* node) { |
VisitRRR(this, kMipsMulS, node); |
} |