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1 // Copyright 2014 the V8 project authors. All rights reserved. | 1 // Copyright 2014 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #include "src/base/adapters.h" | 5 #include "src/base/adapters.h" |
6 #include "src/base/bits.h" | 6 #include "src/base/bits.h" |
7 #include "src/compiler/instruction-selector-impl.h" | 7 #include "src/compiler/instruction-selector-impl.h" |
8 #include "src/compiler/node-matchers.h" | 8 #include "src/compiler/node-matchers.h" |
9 #include "src/compiler/node-properties.h" | 9 #include "src/compiler/node-properties.h" |
10 | 10 |
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757 | 757 |
758 void InstructionSelector::VisitFloat64Add(Node* node) { | 758 void InstructionSelector::VisitFloat64Add(Node* node) { |
759 VisitRRR(this, kMipsAddD, node); | 759 VisitRRR(this, kMipsAddD, node); |
760 } | 760 } |
761 | 761 |
762 | 762 |
763 void InstructionSelector::VisitFloat32Sub(Node* node) { | 763 void InstructionSelector::VisitFloat32Sub(Node* node) { |
764 VisitRRR(this, kMipsSubS, node); | 764 VisitRRR(this, kMipsSubS, node); |
765 } | 765 } |
766 | 766 |
767 void InstructionSelector::VisitFloat32SubPreserveNan(Node* node) { | |
768 VisitRRR(this, kMipsSubPreserveNanS, node); | |
769 } | |
770 | |
771 void InstructionSelector::VisitFloat64Sub(Node* node) { | 767 void InstructionSelector::VisitFloat64Sub(Node* node) { |
772 MipsOperandGenerator g(this); | |
773 Float64BinopMatcher m(node); | |
774 if (m.left().IsMinusZero() && m.right().IsFloat64RoundDown() && | |
775 CanCover(m.node(), m.right().node())) { | |
776 if (m.right().InputAt(0)->opcode() == IrOpcode::kFloat64Sub && | |
777 CanCover(m.right().node(), m.right().InputAt(0))) { | |
778 Float64BinopMatcher mright0(m.right().InputAt(0)); | |
779 if (mright0.left().IsMinusZero()) { | |
780 Emit(kMipsFloat64RoundUp, g.DefineAsRegister(node), | |
781 g.UseRegister(mright0.right().node())); | |
782 return; | |
783 } | |
784 } | |
785 } | |
786 VisitRRR(this, kMipsSubD, node); | 768 VisitRRR(this, kMipsSubD, node); |
787 } | 769 } |
788 | 770 |
789 void InstructionSelector::VisitFloat64SubPreserveNan(Node* node) { | |
790 VisitRRR(this, kMipsSubPreserveNanD, node); | |
791 } | |
792 | |
793 void InstructionSelector::VisitFloat32Mul(Node* node) { | 771 void InstructionSelector::VisitFloat32Mul(Node* node) { |
794 VisitRRR(this, kMipsMulS, node); | 772 VisitRRR(this, kMipsMulS, node); |
795 } | 773 } |
796 | 774 |
797 | 775 |
798 void InstructionSelector::VisitFloat64Mul(Node* node) { | 776 void InstructionSelector::VisitFloat64Mul(Node* node) { |
799 VisitRRR(this, kMipsMulD, node); | 777 VisitRRR(this, kMipsMulD, node); |
800 } | 778 } |
801 | 779 |
802 | 780 |
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1654 DCHECK(IsMipsArchVariant(kLoongson) || IsMipsArchVariant(kMips32r1) || | 1632 DCHECK(IsMipsArchVariant(kLoongson) || IsMipsArchVariant(kMips32r1) || |
1655 IsMipsArchVariant(kMips32r2)); | 1633 IsMipsArchVariant(kMips32r2)); |
1656 return MachineOperatorBuilder::AlignmentRequirements:: | 1634 return MachineOperatorBuilder::AlignmentRequirements:: |
1657 NoUnalignedAccessSupport(); | 1635 NoUnalignedAccessSupport(); |
1658 } | 1636 } |
1659 } | 1637 } |
1660 | 1638 |
1661 } // namespace compiler | 1639 } // namespace compiler |
1662 } // namespace internal | 1640 } // namespace internal |
1663 } // namespace v8 | 1641 } // namespace v8 |
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