Index: src/compiler/mips/instruction-selector-mips.cc |
diff --git a/src/compiler/mips/instruction-selector-mips.cc b/src/compiler/mips/instruction-selector-mips.cc |
index be0a234874a1aa2b23f09b909623a3748bc302db..8e5744cb1fe1362fda439202ccedca5519c53e4c 100644 |
--- a/src/compiler/mips/instruction-selector-mips.cc |
+++ b/src/compiler/mips/instruction-selector-mips.cc |
@@ -814,63 +814,17 @@ void InstructionSelector::VisitFloat64Mod(Node* node) { |
} |
-void InstructionSelector::VisitFloat32Max(Node* node) { |
- MipsOperandGenerator g(this); |
- if (IsMipsArchVariant(kMips32r6)) { |
- Emit(kMipsFloat32Max, g.DefineAsRegister(node), |
- g.UseUniqueRegister(node->InputAt(0)), |
- g.UseUniqueRegister(node->InputAt(1))); |
- |
- } else { |
- // Reverse operands, and use same reg. for result and right operand. |
- Emit(kMipsFloat32Max, g.DefineSameAsFirst(node), |
- g.UseRegister(node->InputAt(1)), g.UseRegister(node->InputAt(0))); |
- } |
-} |
- |
- |
void InstructionSelector::VisitFloat64Max(Node* node) { |
MipsOperandGenerator g(this); |
- if (IsMipsArchVariant(kMips32r6)) { |
- Emit(kMipsFloat64Max, g.DefineAsRegister(node), |
- g.UseUniqueRegister(node->InputAt(0)), |
- g.UseUniqueRegister(node->InputAt(1))); |
- |
- } else { |
- // Reverse operands, and use same reg. for result and right operand. |
- Emit(kMipsFloat64Max, g.DefineSameAsFirst(node), |
- g.UseRegister(node->InputAt(1)), g.UseRegister(node->InputAt(0))); |
- } |
-} |
- |
- |
-void InstructionSelector::VisitFloat32Min(Node* node) { |
- MipsOperandGenerator g(this); |
- if (IsMipsArchVariant(kMips32r6)) { |
- Emit(kMipsFloat32Min, g.DefineAsRegister(node), |
- g.UseUniqueRegister(node->InputAt(0)), |
- g.UseUniqueRegister(node->InputAt(1))); |
- |
- } else { |
- // Reverse operands, and use same reg. for result and right operand. |
- Emit(kMipsFloat32Min, g.DefineSameAsFirst(node), |
- g.UseRegister(node->InputAt(1)), g.UseRegister(node->InputAt(0))); |
- } |
+ Emit(kMipsFloat64Max, g.DefineAsRegister(node), |
+ g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
} |
void InstructionSelector::VisitFloat64Min(Node* node) { |
MipsOperandGenerator g(this); |
- if (IsMipsArchVariant(kMips32r6)) { |
- Emit(kMipsFloat64Min, g.DefineAsRegister(node), |
- g.UseUniqueRegister(node->InputAt(0)), |
- g.UseUniqueRegister(node->InputAt(1))); |
- |
- } else { |
- // Reverse operands, and use same reg. for result and right operand. |
- Emit(kMipsFloat64Min, g.DefineSameAsFirst(node), |
- g.UseRegister(node->InputAt(1)), g.UseRegister(node->InputAt(0))); |
- } |
+ Emit(kMipsFloat64Min, g.DefineAsRegister(node), |
+ g.UseRegister(node->InputAt(0)), g.UseRegister(node->InputAt(1))); |
} |
@@ -1582,10 +1536,6 @@ InstructionSelector::SupportedMachineOperatorFlags() { |
MachineOperatorBuilder::kInt32DivIsSafe | |
MachineOperatorBuilder::kUint32DivIsSafe | |
MachineOperatorBuilder::kWord32ShiftIsSafe | |
- MachineOperatorBuilder::kFloat64Min | |
- MachineOperatorBuilder::kFloat64Max | |
- MachineOperatorBuilder::kFloat32Min | |
- MachineOperatorBuilder::kFloat32Max | |
MachineOperatorBuilder::kFloat32RoundDown | |
MachineOperatorBuilder::kFloat32RoundUp | |
MachineOperatorBuilder::kFloat32RoundTruncate | |