| Index: src/compiler/mips64/code-generator-mips64.cc
|
| diff --git a/src/compiler/mips64/code-generator-mips64.cc b/src/compiler/mips64/code-generator-mips64.cc
|
| index 0d0a0b8b5a3f54be2ffb475e5aef0c58d31323ce..d342ccffe97d3e32c33fc48e50f141e90ea998e9 100644
|
| --- a/src/compiler/mips64/code-generator-mips64.cc
|
| +++ b/src/compiler/mips64/code-generator-mips64.cc
|
| @@ -1391,64 +1391,30 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction(
|
| break;
|
| }
|
| case kMips64Float64Max: {
|
| - // (b < a) ? a : b
|
| - if (kArchVariant == kMips64r6) {
|
| - __ cmp_d(OLT, i.OutputDoubleRegister(), i.InputDoubleRegister(1),
|
| - i.InputDoubleRegister(0));
|
| - __ sel_d(i.OutputDoubleRegister(), i.InputDoubleRegister(1),
|
| - i.InputDoubleRegister(0));
|
| - } else {
|
| - __ c_d(OLT, i.InputDoubleRegister(0), i.InputDoubleRegister(1));
|
| - // Left operand is result, passthrough if false.
|
| - __ movt_d(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
|
| - }
|
| + Label compare_nan, done_compare;
|
| + __ MaxNaNCheck_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
|
| + i.InputDoubleRegister(1), &compare_nan);
|
| + __ Branch(&done_compare);
|
| + __ bind(&compare_nan);
|
| + __ Move(i.OutputDoubleRegister(),
|
| + std::numeric_limits<double>::quiet_NaN());
|
| + __ bind(&done_compare);
|
| break;
|
| }
|
| case kMips64Float64Min: {
|
| - // (a < b) ? a : b
|
| - if (kArchVariant == kMips64r6) {
|
| - __ cmp_d(OLT, i.OutputDoubleRegister(), i.InputDoubleRegister(0),
|
| - i.InputDoubleRegister(1));
|
| - __ sel_d(i.OutputDoubleRegister(), i.InputDoubleRegister(1),
|
| - i.InputDoubleRegister(0));
|
| - } else {
|
| - __ c_d(OLT, i.InputDoubleRegister(1), i.InputDoubleRegister(0));
|
| - // Right operand is result, passthrough if false.
|
| - __ movt_d(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
|
| - }
|
| + Label compare_nan, done_compare;
|
| + __ MinNaNCheck_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0),
|
| + i.InputDoubleRegister(1), &compare_nan);
|
| + __ Branch(&done_compare);
|
| + __ bind(&compare_nan);
|
| + __ Move(i.OutputDoubleRegister(),
|
| + std::numeric_limits<double>::quiet_NaN());
|
| + __ bind(&done_compare);
|
| break;
|
| }
|
| case kMips64Float64SilenceNaN:
|
| __ FPUCanonicalizeNaN(i.OutputDoubleRegister(), i.InputDoubleRegister(0));
|
| break;
|
| - case kMips64Float32Max: {
|
| - // (b < a) ? a : b
|
| - if (kArchVariant == kMips64r6) {
|
| - __ cmp_s(OLT, i.OutputDoubleRegister(), i.InputDoubleRegister(1),
|
| - i.InputDoubleRegister(0));
|
| - __ sel_s(i.OutputDoubleRegister(), i.InputDoubleRegister(1),
|
| - i.InputDoubleRegister(0));
|
| - } else {
|
| - __ c_s(OLT, i.InputDoubleRegister(0), i.InputDoubleRegister(1));
|
| - // Left operand is result, passthrough if false.
|
| - __ movt_s(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
|
| - }
|
| - break;
|
| - }
|
| - case kMips64Float32Min: {
|
| - // (a < b) ? a : b
|
| - if (kArchVariant == kMips64r6) {
|
| - __ cmp_s(OLT, i.OutputDoubleRegister(), i.InputDoubleRegister(0),
|
| - i.InputDoubleRegister(1));
|
| - __ sel_s(i.OutputDoubleRegister(), i.InputDoubleRegister(1),
|
| - i.InputDoubleRegister(0));
|
| - } else {
|
| - __ c_s(OLT, i.InputDoubleRegister(1), i.InputDoubleRegister(0));
|
| - // Right operand is result, passthrough if false.
|
| - __ movt_s(i.OutputDoubleRegister(), i.InputDoubleRegister(1));
|
| - }
|
| - break;
|
| - }
|
| case kMips64CvtSD:
|
| __ cvt_s_d(i.OutputSingleRegister(), i.InputDoubleRegister(0));
|
| break;
|
|
|