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Issue 214183004: Implement AES in different modes of operation, using AES-NI and (Closed)

Created:
6 years, 9 months ago by wtc
Modified:
6 years, 8 months ago
Reviewers:
agl, Ryan Sleevi
Base URL:
https://chromium.googlesource.com/chromium/deps/nss.git@master
Visibility:
Public.

Description

[Replaced by https://codereview.chromium.org/250463004/ for the commit queue.] Implement AES in different modes of operation, using AES-NI and PCLMULQDQ-NI, for WIN32 and WIN64 platforms. Only the WIN32 assembly code is used right now. By Shay Gueron and Vlad Krasnov, Intel. Upstream NSS bug: https://bugzilla.mozilla.org/show_bug.cgi?id=979703 R=agl@chromium.org,rsleevi@chromium.org BUG=none

Patch Set 1 #

Patch Set 2 : Apply Shay's patch #

Patch Set 3 : Work around AES CBC decryption bug for 192 and 256 bit keys #

Patch Set 4 : Fix the AES ECB and CBC decryption bugs for 192-bit and 256-bit keys. #

Patch Set 5 : Fix formatting issues. #

Patch Set 6 : Fix some more formatting issues. #

Patch Set 7 : Use MASM settings. #

Patch Set 8 : Fix a bug in (unused) 64-bit CBC decryption. Fix a coding style nit. #

Patch Set 9 : Add a patch file and document it in README.chromium. #

Total comments: 34

Patch Set 10 : Make the changes Ryan suggested. #

Total comments: 6

Patch Set 11 : Remove an assertion. ctr->cipher doesn't set *outlen. #

Unified diffs Side-by-side diffs Delta from patch set Stats (+5286 lines, -1 line) Patch
M README.chromium View 1 2 3 4 5 6 7 8 1 chunk +6 lines, -0 lines 0 comments Download
M nss.gyp View 1 2 3 4 5 6 5 chunks +25 lines, -0 lines 0 comments Download
M nss/lib/freebl/ctr.h View 1 2 3 4 5 1 chunk +7 lines, -0 lines 0 comments Download
M nss/lib/freebl/ctr.c View 1 2 3 4 5 6 7 8 9 10 2 chunks +62 lines, -0 lines 0 comments Download
A nss/lib/freebl/intel-aes.h View 1 2 3 4 1 chunk +146 lines, -0 lines 0 comments Download
A nss/lib/freebl/intel-aes-x64-masm.asm View 1 2 3 4 5 6 7 1 chunk +971 lines, -0 lines 0 comments Download
A nss/lib/freebl/intel-aes-x86-masm.asm View 1 2 3 4 1 chunk +949 lines, -0 lines 0 comments Download
A nss/lib/freebl/intel-gcm.h View 1 chunk +83 lines, -0 lines 0 comments Download
A nss/lib/freebl/intel-gcm-wrap.c View 1 2 3 4 5 6 7 8 9 1 chunk +240 lines, -0 lines 0 comments Download
A nss/lib/freebl/intel-gcm-x64-masm.asm View 1 2 3 4 5 1 chunk +1301 lines, -0 lines 0 comments Download
A nss/lib/freebl/intel-gcm-x86-masm.asm View 1 2 3 4 1 chunk +1212 lines, -0 lines 0 comments Download
M nss/lib/freebl/rijndael.c View 1 2 3 4 5 6 7 8 9 3 chunks +12 lines, -1 line 0 comments Download
A patches/nss-intel-aes-windows.patch View 1 2 3 4 5 6 7 8 9 10 1 chunk +272 lines, -0 lines 0 comments Download

Messages

Total messages: 8 (0 generated)
wtc
This CL is now ready for review. I had to enhance GYP to assemble assembly ...
6 years, 8 months ago (2014-04-23 18:13:19 UTC) #1
Ryan Sleevi
I have not yet reviewed the ASM - that may take some time for me ...
6 years, 8 months ago (2014-04-23 19:53:34 UTC) #2
wtc
Ryan: thanks for the review. In patch set 10, I made the changes you suggested. ...
6 years, 8 months ago (2014-04-24 01:04:09 UTC) #3
agl
LGTM. (I'll have to assume that the KATs will test the ASM code. I've not ...
6 years, 8 months ago (2014-04-24 01:30:37 UTC) #4
wtc
https://codereview.chromium.org/214183004/diff/160001/nss/lib/freebl/intel-gcm-wrap.c File nss/lib/freebl/intel-gcm-wrap.c (right): https://codereview.chromium.org/214183004/diff/160001/nss/lib/freebl/intel-gcm-wrap.c#newcode78 nss/lib/freebl/intel-gcm-wrap.c:78: /* Initial TAG value is zero*/ On 2014/04/24 01:30:38, ...
6 years, 8 months ago (2014-04-24 17:45:41 UTC) #5
wtc
The CQ bit was checked by wtc@chromium.org
6 years, 8 months ago (2014-04-24 17:47:16 UTC) #6
commit-bot: I haz the power
The CQ bit was unchecked by commit-bot@chromium.org
6 years, 8 months ago (2014-04-24 17:50:05 UTC) #7
commit-bot: I haz the power
6 years, 8 months ago (2014-04-24 17:50:06 UTC) #8
Commit queue rejected this change because it did not recognize the base URL.
Please commit your change manually.

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