MIPS: [turbofan] Fix addition for deoptimization.

src/compiler/mips64/code-generator-mips64.cc

Index: src/compiler/mips64/code-generator-mips64.cc
diff --git a/src/compiler/mips64/code-generator-mips64.cc b/src/compiler/mips64/code-generator-mips64.cc
index 996c8792490552c98138fc90df5559a3e94551c8..469824ecb37bdc9ada3c62625fe6e58361470223 100644
--- a/src/compiler/mips64/code-generator-mips64.cc
+++ b/src/compiler/mips64/code-generator-mips64.cc
@@ -1794,10 +1794,21 @@ void CodeGenerator::AssembleArchBranch(Instruction* instr, BranchInfo* branch) {
     __ Branch(tlabel, cc, at, Operand(zero_reg));
   } else if (instr->arch_opcode() == kMips64Dadd ||
              instr->arch_opcode() == kMips64Dsub) {
+    Label done;
     cc = FlagsConditionToConditionOvf(branch->condition);
     __ dsra32(kScratchReg, i.OutputRegister(), 0);
     __ sra(at, i.OutputRegister(), 31);
-    __ Branch(tlabel, cc, at, Operand(kScratchReg));
+    __ Branch(&done, NegateCondition(cc), at, Operand(kScratchReg));
+    // If we deoptimize, check if output register is the same as input
+    // registers, if yes input values are overwritten so fix them first.
+    if (instr->InputAt(1)->IsRegister()) {
+      if (i.InputRegister(0).is(i.OutputRegister()) &&
+          i.InputRegister(1).is(i.OutputRegister())) {
+        __ dsra(i.OutputRegister(), i.OutputRegister(), 1);
+      }
+    }
+    __ Branch(tlabel);
+    __ bind(&done);
   } else if (instr->arch_opcode() == kMips64DaddOvf) {
     switch (branch->condition) {
       case kOverflow: