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Issue 2102063002: MIPS: [turbofan] Fix addition for deoptimization. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Rebase to master Created 4 years, 5 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/ast/scopes.h" 5 #include "src/ast/scopes.h"
6 #include "src/compiler/code-generator.h" 6 #include "src/compiler/code-generator.h"
7 #include "src/compiler/code-generator-impl.h" 7 #include "src/compiler/code-generator-impl.h"
8 #include "src/compiler/gap-resolver.h" 8 #include "src/compiler/gap-resolver.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/osr.h" 10 #include "src/compiler/osr.h"
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1787 // instructions that do the actual comparison. Essential that the input 1787 // instructions that do the actual comparison. Essential that the input
1788 // registers to compare pseudo-op are not modified before this branch op, as 1788 // registers to compare pseudo-op are not modified before this branch op, as
1789 // they are tested here. 1789 // they are tested here.
1790 1790
1791 if (instr->arch_opcode() == kMips64Tst) { 1791 if (instr->arch_opcode() == kMips64Tst) {
1792 cc = FlagsConditionToConditionTst(branch->condition); 1792 cc = FlagsConditionToConditionTst(branch->condition);
1793 __ And(at, i.InputRegister(0), i.InputOperand(1)); 1793 __ And(at, i.InputRegister(0), i.InputOperand(1));
1794 __ Branch(tlabel, cc, at, Operand(zero_reg)); 1794 __ Branch(tlabel, cc, at, Operand(zero_reg));
1795 } else if (instr->arch_opcode() == kMips64Dadd || 1795 } else if (instr->arch_opcode() == kMips64Dadd ||
1796 instr->arch_opcode() == kMips64Dsub) { 1796 instr->arch_opcode() == kMips64Dsub) {
1797 Label done;
1797 cc = FlagsConditionToConditionOvf(branch->condition); 1798 cc = FlagsConditionToConditionOvf(branch->condition);
1798 __ dsra32(kScratchReg, i.OutputRegister(), 0); 1799 __ dsra32(kScratchReg, i.OutputRegister(), 0);
1799 __ sra(at, i.OutputRegister(), 31); 1800 __ sra(at, i.OutputRegister(), 31);
1800 __ Branch(tlabel, cc, at, Operand(kScratchReg)); 1801 __ Branch(&done, NegateCondition(cc), at, Operand(kScratchReg));
1802 // If we deoptimize, check if output register is the same as input
1803 // registers, if yes input values are overwritten so fix them first.
1804 if (instr->InputAt(1)->IsRegister()) {
1805 if (i.InputRegister(0).is(i.OutputRegister()) &&
1806 i.InputRegister(1).is(i.OutputRegister())) {
1807 __ dsra(i.OutputRegister(), i.OutputRegister(), 1);
1808 }
1809 }
1810 __ Branch(tlabel);
1811 __ bind(&done);
1801 } else if (instr->arch_opcode() == kMips64DaddOvf) { 1812 } else if (instr->arch_opcode() == kMips64DaddOvf) {
1802 switch (branch->condition) { 1813 switch (branch->condition) {
1803 case kOverflow: 1814 case kOverflow:
1804 __ DaddBranchOvf(i.OutputRegister(), i.InputRegister(0), 1815 __ DaddBranchOvf(i.OutputRegister(), i.InputRegister(0),
1805 i.InputOperand(1), tlabel, flabel); 1816 i.InputOperand(1), tlabel, flabel);
1806 break; 1817 break;
1807 case kNotOverflow: 1818 case kNotOverflow:
1808 __ DaddBranchOvf(i.OutputRegister(), i.InputRegister(0), 1819 __ DaddBranchOvf(i.OutputRegister(), i.InputRegister(0),
1809 i.InputOperand(1), flabel, tlabel); 1820 i.InputOperand(1), flabel, tlabel);
1810 break; 1821 break;
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2372 padding_size -= v8::internal::Assembler::kInstrSize; 2383 padding_size -= v8::internal::Assembler::kInstrSize;
2373 } 2384 }
2374 } 2385 }
2375 } 2386 }
2376 2387
2377 #undef __ 2388 #undef __
2378 2389
2379 } // namespace compiler 2390 } // namespace compiler
2380 } // namespace internal 2391 } // namespace internal
2381 } // namespace v8 2392 } // namespace v8
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