ARM: Fix Q register encoding

src/arm/simulator-arm.cc

 // Copyright 2012 the V8 project authors. All rights reserved.
 // Redistribution and use in source and binary forms, with or without
 // modification, are permitted provided that the following conditions are
 // met:
 //
 //     * Redistributions of source code must retain the above copyright
 //       notice, this list of conditions and the following disclaimer.
 //     * Redistributions in binary form must reproduce the above
 //       copyright notice, this list of conditions and the following
 //       disclaimer in the documentation and/or other materials provided
@@ skipping 3452 matching lines @@
   }
 }
 
 
 void Simulator::DecodeSpecialCondition(Instruction* instr) {
   switch (instr->SpecialValue()) {
     case 5:
       if ((instr->Bits(18, 16) == 0) && (instr->Bits(11, 6) == 0x28) &&
           (instr->Bit(4) == 1)) {
         // vmovl signed
-        int Vd = (instr->Bit(22) << 4) | instr->VdValue();
+        if ((instr->VdValue() & 1) != 0) UNIMPLEMENTED();
+        int Vd = (instr->Bit(22) << 3) | (instr->VdValue() >> 1);
         int Vm = (instr->Bit(5) << 4) | instr->VmValue();
         int imm3 = instr->Bits(21, 19);
         if ((imm3 != 1) && (imm3 != 2) && (imm3 != 4)) UNIMPLEMENTED();
         int esize = 8 * imm3;
         int elements = 64 / esize;
         int8_t from[8];
         get_d_register(Vm, reinterpret_cast<uint64_t*>(from));
         int16_t to[8];
         int e = 0;
         while (e < elements) {
           to[e] = from[e];
           e++;
         }
         set_q_register(Vd, reinterpret_cast<uint64_t*>(to));
       } else {
         UNIMPLEMENTED();
       }
       break;
     case 7:
       if ((instr->Bits(18, 16) == 0) && (instr->Bits(11, 6) == 0x28) &&
           (instr->Bit(4) == 1)) {
         // vmovl unsigned
-        int Vd = (instr->Bit(22) << 4) | instr->VdValue();
+        if ((instr->VdValue() & 1) != 0) UNIMPLEMENTED();
+        int Vd = (instr->Bit(22) << 3) | (instr->VdValue() >> 1);
         int Vm = (instr->Bit(5) << 4) | instr->VmValue();
         int imm3 = instr->Bits(21, 19);
         if ((imm3 != 1) && (imm3 != 2) && (imm3 != 4)) UNIMPLEMENTED();
         int esize = 8 * imm3;
         int elements = 64 / esize;
         uint8_t from[8];
         get_d_register(Vm, reinterpret_cast<uint64_t*>(from));
         uint16_t to[8];
         int e = 0;
         while (e < elements) {
@@ skipping 343 matching lines @@
   uintptr_t address = *stack_slot;
   set_register(sp, current_sp + sizeof(uintptr_t));
   return address;
 }
 
 } }  // namespace v8::internal
 
 #endif  // USE_SIMULATOR
 
 #endif  // V8_TARGET_ARCH_ARM