Index: src/mips64/assembler-mips64.cc |
diff --git a/src/mips64/assembler-mips64.cc b/src/mips64/assembler-mips64.cc |
index 747b7e27f132bf7d934e1c94b163589f76b3bb0b..7da23ba5f1b88e488beba16cc01a0fa8bdf9376d 100644 |
--- a/src/mips64/assembler-mips64.cc |
+++ b/src/mips64/assembler-mips64.cc |
@@ -1279,7 +1279,6 @@ void Assembler::b(int16_t offset) { |
void Assembler::bal(int16_t offset) { |
- positions_recorder()->WriteRecordedPositions(); |
bgezal(zero_reg, offset); |
} |
@@ -1292,7 +1291,6 @@ void Assembler::bc(int32_t offset) { |
void Assembler::balc(int32_t offset) { |
DCHECK(kArchVariant == kMips64r6); |
- positions_recorder()->WriteRecordedPositions(); |
GenInstrImmediate(BALC, offset, CompactBranchType::COMPACT_BRANCH); |
} |
@@ -1339,7 +1337,6 @@ void Assembler::bgec(Register rs, Register rt, int16_t offset) { |
void Assembler::bgezal(Register rs, int16_t offset) { |
DCHECK(kArchVariant != kMips64r6 || rs.is(zero_reg)); |
BlockTrampolinePoolScope block_trampoline_pool(this); |
- positions_recorder()->WriteRecordedPositions(); |
GenInstrImmediate(REGIMM, rs, BGEZAL, offset); |
BlockTrampolinePoolFor(1); // For associated delay slot. |
} |
@@ -1410,7 +1407,6 @@ void Assembler::bltz(Register rs, int16_t offset) { |
void Assembler::bltzal(Register rs, int16_t offset) { |
DCHECK(kArchVariant != kMips64r6 || rs.is(zero_reg)); |
BlockTrampolinePoolScope block_trampoline_pool(this); |
- positions_recorder()->WriteRecordedPositions(); |
GenInstrImmediate(REGIMM, rs, BLTZAL, offset); |
BlockTrampolinePoolFor(1); // For associated delay slot. |
} |
@@ -1446,7 +1442,6 @@ void Assembler::bnvc(Register rs, Register rt, int16_t offset) { |
void Assembler::blezalc(Register rt, int16_t offset) { |
DCHECK(kArchVariant == kMips64r6); |
DCHECK(!(rt.is(zero_reg))); |
- positions_recorder()->WriteRecordedPositions(); |
GenInstrImmediate(BLEZ, zero_reg, rt, offset, |
CompactBranchType::COMPACT_BRANCH); |
} |
@@ -1455,7 +1450,6 @@ void Assembler::blezalc(Register rt, int16_t offset) { |
void Assembler::bgezalc(Register rt, int16_t offset) { |
DCHECK(kArchVariant == kMips64r6); |
DCHECK(!(rt.is(zero_reg))); |
- positions_recorder()->WriteRecordedPositions(); |
GenInstrImmediate(BLEZ, rt, rt, offset, CompactBranchType::COMPACT_BRANCH); |
} |
@@ -1464,7 +1458,6 @@ void Assembler::bgezall(Register rs, int16_t offset) { |
DCHECK(kArchVariant != kMips64r6); |
DCHECK(!(rs.is(zero_reg))); |
BlockTrampolinePoolScope block_trampoline_pool(this); |
- positions_recorder()->WriteRecordedPositions(); |
GenInstrImmediate(REGIMM, rs, BGEZALL, offset); |
BlockTrampolinePoolFor(1); // For associated delay slot. |
} |
@@ -1473,7 +1466,6 @@ void Assembler::bgezall(Register rs, int16_t offset) { |
void Assembler::bltzalc(Register rt, int16_t offset) { |
DCHECK(kArchVariant == kMips64r6); |
DCHECK(!(rt.is(zero_reg))); |
- positions_recorder()->WriteRecordedPositions(); |
GenInstrImmediate(BGTZ, rt, rt, offset, CompactBranchType::COMPACT_BRANCH); |
} |
@@ -1481,7 +1473,6 @@ void Assembler::bltzalc(Register rt, int16_t offset) { |
void Assembler::bgtzalc(Register rt, int16_t offset) { |
DCHECK(kArchVariant == kMips64r6); |
DCHECK(!(rt.is(zero_reg))); |
- positions_recorder()->WriteRecordedPositions(); |
GenInstrImmediate(BGTZ, zero_reg, rt, offset, |
CompactBranchType::COMPACT_BRANCH); |
} |
@@ -1490,7 +1481,6 @@ void Assembler::bgtzalc(Register rt, int16_t offset) { |
void Assembler::beqzalc(Register rt, int16_t offset) { |
DCHECK(kArchVariant == kMips64r6); |
DCHECK(!(rt.is(zero_reg))); |
- positions_recorder()->WriteRecordedPositions(); |
GenInstrImmediate(ADDI, zero_reg, rt, offset, |
CompactBranchType::COMPACT_BRANCH); |
} |
@@ -1499,7 +1489,6 @@ void Assembler::beqzalc(Register rt, int16_t offset) { |
void Assembler::bnezalc(Register rt, int16_t offset) { |
DCHECK(kArchVariant == kMips64r6); |
DCHECK(!(rt.is(zero_reg))); |
- positions_recorder()->WriteRecordedPositions(); |
GenInstrImmediate(DADDI, zero_reg, rt, offset, |
CompactBranchType::COMPACT_BRANCH); |
} |
@@ -1565,7 +1554,6 @@ void Assembler::jal(Label* target) { |
uint64_t imm = jump_offset(target); |
if (target->is_bound()) { |
BlockTrampolinePoolScope block_trampoline_pool(this); |
- positions_recorder()->WriteRecordedPositions(); |
GenInstrJump(static_cast<Opcode>(kJalRawMark), |
static_cast<uint32_t>(imm >> 2) & kImm26Mask); |
BlockTrampolinePoolFor(1); // For associated delay slot. |
@@ -1578,9 +1566,6 @@ void Assembler::jal(Label* target) { |
void Assembler::jr(Register rs) { |
if (kArchVariant != kMips64r6) { |
BlockTrampolinePoolScope block_trampoline_pool(this); |
- if (rs.is(ra)) { |
- positions_recorder()->WriteRecordedPositions(); |
- } |
GenInstrRegister(SPECIAL, rs, zero_reg, zero_reg, 0, JR); |
BlockTrampolinePoolFor(1); // For associated delay slot. |
} else { |
@@ -1591,7 +1576,6 @@ void Assembler::jr(Register rs) { |
void Assembler::jal(int64_t target) { |
BlockTrampolinePoolScope block_trampoline_pool(this); |
- positions_recorder()->WriteRecordedPositions(); |
GenInstrJump(JAL, static_cast<uint32_t>(target >> 2) & kImm26Mask); |
BlockTrampolinePoolFor(1); // For associated delay slot. |
} |
@@ -1600,7 +1584,6 @@ void Assembler::jal(int64_t target) { |
void Assembler::jalr(Register rs, Register rd) { |
DCHECK(rs.code() != rd.code()); |
BlockTrampolinePoolScope block_trampoline_pool(this); |
- positions_recorder()->WriteRecordedPositions(); |
GenInstrRegister(SPECIAL, rs, zero_reg, rd, 0, JALR); |
BlockTrampolinePoolFor(1); // For associated delay slot. |
} |
@@ -1614,7 +1597,6 @@ void Assembler::jic(Register rt, int16_t offset) { |
void Assembler::jialc(Register rt, int16_t offset) { |
DCHECK(kArchVariant == kMips64r6); |
- positions_recorder()->WriteRecordedPositions(); |
GenInstrImmediate(POP76, zero_reg, rt, offset); |
} |