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Unified Diff: src/mips/lithium-gap-resolver-mips.cc

Issue 20407002: MIPS: Adding Smi support to Add, Sub, Mul, and Bitwise (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 7 years, 5 months ago
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Index: src/mips/lithium-gap-resolver-mips.cc
diff --git a/src/mips/lithium-gap-resolver-mips.cc b/src/mips/lithium-gap-resolver-mips.cc
index 9705e1f41ac34f3b1b198665684dcf0895e5e9a6..771b22862eef896e2819644b7f2a8aadd9aaf5e0 100644
--- a/src/mips/lithium-gap-resolver-mips.cc
+++ b/src/mips/lithium-gap-resolver-mips.cc
@@ -251,10 +251,10 @@ void LGapResolver::EmitMove(int index) {
LConstantOperand* constant_source = LConstantOperand::cast(source);
if (destination->IsRegister()) {
Register dst = cgen_->ToRegister(destination);
- if (cgen_->IsSmi(constant_source)) {
- __ li(dst, Operand(cgen_->ToSmi(constant_source)));
- } else if (cgen_->IsInteger32(constant_source)) {
- __ li(dst, Operand(cgen_->ToInteger32(constant_source)));
+ Representation r = cgen_->IsSmi(constant_source)
+ ? Representation::Smi() : Representation::Integer32();
+ if (cgen_->IsInteger32(constant_source)) {
+ __ li(dst, Operand(cgen_->ToRepresentation(constant_source, r)));
} else {
__ LoadObject(dst, cgen_->ToHandle(constant_source));
}
@@ -265,11 +265,11 @@ void LGapResolver::EmitMove(int index) {
} else {
ASSERT(destination->IsStackSlot());
ASSERT(!in_cycle_); // Constant moves happen after all cycles are gone.
- if (cgen_->IsSmi(constant_source)) {
- __ li(kLithiumScratchReg, Operand(cgen_->ToSmi(constant_source)));
- } else if (cgen_->IsInteger32(constant_source)) {
+ Representation r = cgen_->IsSmi(constant_source)
+ ? Representation::Smi() : Representation::Integer32();
+ if (cgen_->IsInteger32(constant_source)) {
__ li(kLithiumScratchReg,
- Operand(cgen_->ToInteger32(constant_source)));
+ Operand(cgen_->ToRepresentation(constant_source, r)));
} else {
__ LoadObject(kLithiumScratchReg,
cgen_->ToHandle(constant_source));
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