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Issue 20407002: MIPS: Adding Smi support to Add, Sub, Mul, and Bitwise (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge
Patch Set: Created 7 years, 5 months ago
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1 // Copyright 2012 the V8 project authors. All rights reserved. 1 // Copyright 2012 the V8 project authors. All rights reserved.
2 // Redistribution and use in source and binary forms, with or without 2 // Redistribution and use in source and binary forms, with or without
3 // modification, are permitted provided that the following conditions are 3 // modification, are permitted provided that the following conditions are
4 // met: 4 // met:
5 // 5 //
6 // * Redistributions of source code must retain the above copyright 6 // * Redistributions of source code must retain the above copyright
7 // notice, this list of conditions and the following disclaimer. 7 // notice, this list of conditions and the following disclaimer.
8 // * Redistributions in binary form must reproduce the above 8 // * Redistributions in binary form must reproduce the above
9 // copyright notice, this list of conditions and the following 9 // copyright notice, this list of conditions and the following
10 // disclaimer in the documentation and/or other materials provided 10 // disclaimer in the documentation and/or other materials provided
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244 } else { 244 } else {
245 __ lw(kLithiumScratchReg, source_operand); 245 __ lw(kLithiumScratchReg, source_operand);
246 __ sw(kLithiumScratchReg, destination_operand); 246 __ sw(kLithiumScratchReg, destination_operand);
247 } 247 }
248 } 248 }
249 249
250 } else if (source->IsConstantOperand()) { 250 } else if (source->IsConstantOperand()) {
251 LConstantOperand* constant_source = LConstantOperand::cast(source); 251 LConstantOperand* constant_source = LConstantOperand::cast(source);
252 if (destination->IsRegister()) { 252 if (destination->IsRegister()) {
253 Register dst = cgen_->ToRegister(destination); 253 Register dst = cgen_->ToRegister(destination);
254 if (cgen_->IsSmi(constant_source)) { 254 Representation r = cgen_->IsSmi(constant_source)
255 __ li(dst, Operand(cgen_->ToSmi(constant_source))); 255 ? Representation::Smi() : Representation::Integer32();
256 } else if (cgen_->IsInteger32(constant_source)) { 256 if (cgen_->IsInteger32(constant_source)) {
257 __ li(dst, Operand(cgen_->ToInteger32(constant_source))); 257 __ li(dst, Operand(cgen_->ToRepresentation(constant_source, r)));
258 } else { 258 } else {
259 __ LoadObject(dst, cgen_->ToHandle(constant_source)); 259 __ LoadObject(dst, cgen_->ToHandle(constant_source));
260 } 260 }
261 } else if (source->IsDoubleRegister()) { 261 } else if (source->IsDoubleRegister()) {
262 DoubleRegister result = cgen_->ToDoubleRegister(destination); 262 DoubleRegister result = cgen_->ToDoubleRegister(destination);
263 double v = cgen_->ToDouble(constant_source); 263 double v = cgen_->ToDouble(constant_source);
264 __ Move(result, v); 264 __ Move(result, v);
265 } else { 265 } else {
266 ASSERT(destination->IsStackSlot()); 266 ASSERT(destination->IsStackSlot());
267 ASSERT(!in_cycle_); // Constant moves happen after all cycles are gone. 267 ASSERT(!in_cycle_); // Constant moves happen after all cycles are gone.
268 if (cgen_->IsSmi(constant_source)) { 268 Representation r = cgen_->IsSmi(constant_source)
269 __ li(kLithiumScratchReg, Operand(cgen_->ToSmi(constant_source))); 269 ? Representation::Smi() : Representation::Integer32();
270 } else if (cgen_->IsInteger32(constant_source)) { 270 if (cgen_->IsInteger32(constant_source)) {
271 __ li(kLithiumScratchReg, 271 __ li(kLithiumScratchReg,
272 Operand(cgen_->ToInteger32(constant_source))); 272 Operand(cgen_->ToRepresentation(constant_source, r)));
273 } else { 273 } else {
274 __ LoadObject(kLithiumScratchReg, 274 __ LoadObject(kLithiumScratchReg,
275 cgen_->ToHandle(constant_source)); 275 cgen_->ToHandle(constant_source));
276 } 276 }
277 __ sw(kLithiumScratchReg, cgen_->ToMemOperand(destination)); 277 __ sw(kLithiumScratchReg, cgen_->ToMemOperand(destination));
278 } 278 }
279 279
280 } else if (source->IsDoubleRegister()) { 280 } else if (source->IsDoubleRegister()) {
281 DoubleRegister source_register = cgen_->ToDoubleRegister(source); 281 DoubleRegister source_register = cgen_->ToDoubleRegister(source);
282 if (destination->IsDoubleRegister()) { 282 if (destination->IsDoubleRegister()) {
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314 UNREACHABLE(); 314 UNREACHABLE();
315 } 315 }
316 316
317 moves_[index].Eliminate(); 317 moves_[index].Eliminate();
318 } 318 }
319 319
320 320
321 #undef __ 321 #undef __
322 322
323 } } // namespace v8::internal 323 } } // namespace v8::internal
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