src/mips/lithium-codegen-mips.h - Issue 20407002: MIPS: Adding Smi support to Add, Sub, Mul, and Bitwise

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Unified Diff: src/mips/lithium-codegen-mips.h

Issue 20407002: MIPS: Adding Smi support to Add, Sub, Mul, and Bitwise (Closed) Base URL: https://v8.googlecode.com/svn/branches/bleeding_edge

Patch Set: Created 7 years, 5 months ago

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Index: src/mips/lithium-codegen-mips.h

diff --git a/src/mips/lithium-codegen-mips.h b/src/mips/lithium-codegen-mips.h

index f330ee76ce03f34556ee8ff782a36ea56c639552..24175560bd0649ecbb8545d34ee3e974cba4ed51 100644

--- a/src/mips/lithium-codegen-mips.h

+++ b/src/mips/lithium-codegen-mips.h

@@ -114,7 +114,8 @@ class LCodeGen BASE_EMBEDDED {

DoubleRegister EmitLoadDoubleRegister(LOperand* op,

FloatRegister flt_scratch,

DoubleRegister dbl_scratch);

- int ToInteger32(LConstantOperand* op) const;

+ int ToRepresentation(LConstantOperand* op, const Representation& r) const;

+ int32_t ToInteger32(LConstantOperand* op) const;

Smi* ToSmi(LConstantOperand* op) const;

double ToDouble(LConstantOperand* op) const;

Operand ToOperand(LOperand* op);

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