[Subzero][MIPS32] Add LowerStore implementation

src/IceInstMIPS32.cpp

Index: src/IceInstMIPS32.cpp
diff --git a/src/IceInstMIPS32.cpp b/src/IceInstMIPS32.cpp
index f9a4793d425a833d3701911e4be5d6a91195aa2d..0da0ce85aa7be7cee609767dca99a28161f1ee8d 100644
--- a/src/IceInstMIPS32.cpp
+++ b/src/IceInstMIPS32.cpp
@@ -80,6 +80,7 @@ template <> const char *InstMIPS32Srl::Opcode = "srl";
 template <> const char *InstMIPS32Srlv::Opcode = "srlv";
 template <> const char *InstMIPS32Sub::Opcode = "sub";
 template <> const char *InstMIPS32Subu::Opcode = "subu";
+template <> const char *InstMIPS32Sw::Opcode = "sw";
 template <> const char *InstMIPS32Xor::Opcode = "xor";
 template <> const char *InstMIPS32Xori::Opcode = "xori";
 
@@ -203,8 +204,12 @@ void InstMIPS32::dump(const Cfg *Func) const {
 void OperandMIPS32Mem::emit(const Cfg *Func) const {
   if (!BuildDefs::dump())
     return;
-  llvm_unreachable("Not yet implemented");
-  (void)Func;
+  Ostream &Str = Func->getContext()->getStrEmit();
+  ConstantInteger32 *Offset = getOffset();
+  Offset->emit(Func);
+  Str << "(";
+  getBase()->emit(Func);
+  Str << ")";
 }
 
 void InstMIPS32::emitUnaryopGPR(const char *Opcode, const InstMIPS32 *Inst,