A64: Fix a few simulation inaccuracies.

src/a64/simulator-a64.h

Index: src/a64/simulator-a64.h
diff --git a/src/a64/simulator-a64.h b/src/a64/simulator-a64.h
index 602d72395b3a2a26598bd655f3cceeeb7c566c9a..de7330bc53fceaab6447133c957fdf8580d63db3 100644
--- a/src/a64/simulator-a64.h
+++ b/src/a64/simulator-a64.h
@@ -537,8 +537,9 @@ class Simulator : public DecoderVisitor {
   SimSystemRegister& nzcv() { return nzcv_; }
 
   // TODO(jbramley): Find a way to make the fpcr_ members return the proper
-  // types, so this accessor is not necessary.
+  // types, so these accessors are not necessary.
   FPRounding RMode() { return static_cast<FPRounding>(fpcr_.RMode()); }
+  bool DN() { return fpcr_.DN() != 0; }
   SimSystemRegister& fpcr() { return fpcr_; }
 
   // Debug helpers
@@ -707,6 +708,9 @@ class Simulator : public DecoderVisitor {
   uint64_t ReverseBits(uint64_t value, unsigned num_bits);
   uint64_t ReverseBytes(uint64_t value, ReverseByteMode mode);
 
+  template <typename T>
+  T FPDefaultNaN() const;
+
   void FPCompare(double val0, double val1);
   double FPRoundInt(double value, FPRounding round_mode);
   double FPToDouble(float value);
@@ -721,17 +725,47 @@ class Simulator : public DecoderVisitor {
   uint64_t FPToUInt64(double value, FPRounding rmode);
 
   template <typename T>
-  T FPMax(T a, T b);
+  T FPAdd(T op1, T op2);
 
   template <typename T>
-  T FPMin(T a, T b);
+  T FPDiv(T op1, T op2);
+
+  template <typename T>
+  T FPMax(T a, T b);
 
   template <typename T>
   T FPMaxNM(T a, T b);
 
   template <typename T>
+  T FPMin(T a, T b);
+
+  template <typename T>
   T FPMinNM(T a, T b);
 
+  template <typename T>
+  T FPMul(T op1, T op2);
+
+  template <typename T>
+  T FPMulAdd(T a, T op1, T op2);
+
+  template <typename T>
+  T FPSqrt(T op);
+
+  template <typename T>
+  T FPSub(T op1, T op2);
+
+  // Standard NaN processing.
+  template <typename T>
+  T FPProcessNaN(T op);
+
+  bool FPProcessNaNs(Instruction* instr);
+
+  template <typename T>
+  T FPProcessNaNs(T op1, T op2);
+
+  template <typename T>
+  T FPProcessNaNs3(T op1, T op2, T op3);
+
   void CheckStackAlignment();
 
   inline void CheckPCSComplianceAndRun();
@@ -784,7 +818,6 @@ class Simulator : public DecoderVisitor {
   // functions, or to save and restore it when entering and leaving generated
   // code.
   void AssertSupportedFPCR() {
-    ASSERT(fpcr().DN() == 0);             // No default-NaN support.
     ASSERT(fpcr().FZ() == 0);             // No flush-to-zero support.
     ASSERT(fpcr().RMode() == FPTieEven);  // Ties-to-even rounding only.