Index: src/mips/lithium-codegen-mips.cc |
diff --git a/src/mips/lithium-codegen-mips.cc b/src/mips/lithium-codegen-mips.cc |
index b5102a4a1a73a184d6a44dcbc34f6a5ed1e61d4e..cd8c7ff68c954edf256aa15e8d8f0edf512b8e32 100644 |
--- a/src/mips/lithium-codegen-mips.cc |
+++ b/src/mips/lithium-codegen-mips.cc |
@@ -259,6 +259,13 @@ void LCodeGen::GenerateOsrPrologue() { |
} |
+void LCodeGen::GenerateBodyInstructionPre(LInstruction* instr) { |
+ if (!instr->IsLazyBailout() && !instr->IsGap()) { |
+ safepoints_.BumpLastLazySafepointIndex(); |
+ } |
+} |
+ |
+ |
bool LCodeGen::GenerateDeferredCode() { |
ASSERT(is_generating()); |
if (deferred_.length() > 0) { |