| Index: runtime/vm/flow_graph_compiler_arm.cc
|
| ===================================================================
|
| --- runtime/vm/flow_graph_compiler_arm.cc (revision 25073)
|
| +++ runtime/vm/flow_graph_compiler_arm.cc (working copy)
|
| @@ -756,7 +756,7 @@
|
| __ str(loc.reg(), dest);
|
| }
|
| } else {
|
| - Address src = loc.ToStackSlotAddress();
|
| + const Address& src = Address::StackSlotAddress(loc);
|
| if (!src.Equals(dest)) {
|
| if (!*push_emitted) {
|
| __ Push(R0);
|
| @@ -1703,15 +1703,15 @@
|
| __ mov(destination.reg(), ShifterOperand(source.reg()));
|
| } else {
|
| ASSERT(destination.IsStackSlot());
|
| - __ str(source.reg(), destination.ToStackSlotAddress());
|
| + __ str(source.reg(), Address::StackSlotAddress(destination));
|
| }
|
| } else if (source.IsStackSlot()) {
|
| if (destination.IsRegister()) {
|
| - __ ldr(destination.reg(), source.ToStackSlotAddress());
|
| + __ ldr(destination.reg(), Address::StackSlotAddress(source));
|
| } else {
|
| ASSERT(destination.IsStackSlot());
|
| - MoveMemoryToMemory(destination.ToStackSlotAddress(),
|
| - source.ToStackSlotAddress());
|
| + MoveMemoryToMemory(Address::StackSlotAddress(destination),
|
| + Address::StackSlotAddress(source));
|
| }
|
| } else if (source.IsFpuRegister()) {
|
| if (destination.IsFpuRegister()) {
|
| @@ -1721,7 +1721,7 @@
|
| } else {
|
| if (destination.IsDoubleStackSlot()) {
|
| DRegister src = EvenDRegisterOf(source.fpu_reg());
|
| - __ vstrd(src, destination.ToStackSlotAddress());
|
| + __ vstrd(src, Address::StackSlotAddress(destination));
|
| } else {
|
| ASSERT(destination.IsQuadStackSlot());
|
| UNIMPLEMENTED();
|
| @@ -1730,11 +1730,11 @@
|
| } else if (source.IsDoubleStackSlot()) {
|
| if (destination.IsFpuRegister()) {
|
| DRegister dst = EvenDRegisterOf(destination.fpu_reg());
|
| - __ vldrd(dst, source.ToStackSlotAddress());
|
| + __ vldrd(dst, Address::StackSlotAddress(source));
|
| } else {
|
| ASSERT(destination.IsDoubleStackSlot());
|
| - __ vldrd(DTMP, source.ToStackSlotAddress());
|
| - __ vstrd(DTMP, destination.ToStackSlotAddress());
|
| + __ vldrd(DTMP, Address::StackSlotAddress(source));
|
| + __ vstrd(DTMP, Address::StackSlotAddress(destination));
|
| }
|
| } else if (source.IsQuadStackSlot()) {
|
| UNIMPLEMENTED();
|
| @@ -1745,7 +1745,7 @@
|
| __ LoadObject(destination.reg(), constant);
|
| } else {
|
| ASSERT(destination.IsStackSlot());
|
| - StoreObject(destination.ToStackSlotAddress(), source.constant());
|
| + StoreObject(Address::StackSlotAddress(destination), source.constant());
|
| }
|
| }
|
|
|
| @@ -1765,11 +1765,12 @@
|
| __ mov(source.reg(), ShifterOperand(destination.reg()));
|
| __ mov(destination.reg(), ShifterOperand(IP));
|
| } else if (source.IsRegister() && destination.IsStackSlot()) {
|
| - Exchange(source.reg(), destination.ToStackSlotAddress());
|
| + Exchange(source.reg(), Address::StackSlotAddress(destination));
|
| } else if (source.IsStackSlot() && destination.IsRegister()) {
|
| - Exchange(destination.reg(), source.ToStackSlotAddress());
|
| + Exchange(destination.reg(), Address::StackSlotAddress(source));
|
| } else if (source.IsStackSlot() && destination.IsStackSlot()) {
|
| - Exchange(destination.ToStackSlotAddress(), source.ToStackSlotAddress());
|
| + Exchange(Address::StackSlotAddress(destination),
|
| + Address::StackSlotAddress(source));
|
| } else if (source.IsFpuRegister() && destination.IsFpuRegister()) {
|
| DRegister dst = EvenDRegisterOf(destination.fpu_reg());
|
| DRegister src = EvenDRegisterOf(source.fpu_reg());
|
| @@ -1787,8 +1788,8 @@
|
| : destination.fpu_reg();
|
| DRegister reg = EvenDRegisterOf(qreg);
|
| const Address& slot_address = source.IsFpuRegister()
|
| - ? destination.ToStackSlotAddress()
|
| - : source.ToStackSlotAddress();
|
| + ? Address::StackSlotAddress(destination)
|
| + : Address::StackSlotAddress(source);
|
|
|
| if (double_width) {
|
| __ vldrd(DTMP, slot_address);
|
| @@ -1798,8 +1799,9 @@
|
| UNIMPLEMENTED();
|
| }
|
| } else if (source.IsDoubleStackSlot() && destination.IsDoubleStackSlot()) {
|
| - const Address& source_slot_address = source.ToStackSlotAddress();
|
| - const Address& destination_slot_address = destination.ToStackSlotAddress();
|
| + const Address& source_slot_address = Address::StackSlotAddress(source);
|
| + const Address& destination_slot_address =
|
| + Address::StackSlotAddress(destination);
|
|
|
| ScratchFpuRegisterScope ensure_scratch(this, QTMP);
|
| DRegister scratch = EvenDRegisterOf(ensure_scratch.reg());
|
|
|