A64: Rename k<Y>RegSize to k<Y>RegSizeInBits, and k<Y>RegSizeInBytes to k<Y>RegSize.

src/a64/disasm-a64.cc

Index: src/a64/disasm-a64.cc
diff --git a/src/a64/disasm-a64.cc b/src/a64/disasm-a64.cc
index a28800a34dc2f4abdff62219687ae08ac651d6ef..703595b42802f41c0703c6cb3ae439bb6617620a 100644
--- a/src/a64/disasm-a64.cc
+++ b/src/a64/disasm-a64.cc
@@ -255,8 +255,8 @@ void Disassembler::VisitLogicalImmediate(Instruction* instr) {
     case ORR_w_imm:
     case ORR_x_imm: {
       mnemonic = "orr";
-      unsigned reg_size = (instr->SixtyFourBits() == 1) ? kXRegSize
-                                                        : kWRegSize;
+      unsigned reg_size = (instr->SixtyFourBits() == 1) ? kXRegSizeInBits
+                                                        : kWRegSizeInBits;
       if (rn_is_zr && !IsMovzMovnImm(reg_size, instr->ImmLogical())) {
         mnemonic = "mov";
         form = "'Rds, 'ITri";
@@ -281,8 +281,8 @@ void Disassembler::VisitLogicalImmediate(Instruction* instr) {
 
 
 bool Disassembler::IsMovzMovnImm(unsigned reg_size, uint64_t value) {
-  ASSERT((reg_size == kXRegSize) ||
-         ((reg_size == kWRegSize) && (value <= 0xffffffff)));
+  ASSERT((reg_size == kXRegSizeInBits) ||
+         ((reg_size == kWRegSizeInBits) && (value <= 0xffffffff)));
 
   // Test for movz: 16-bits set at positions 0, 16, 32 or 48.
   if (((value & 0xffffffffffff0000UL) == 0UL) ||
@@ -293,14 +293,14 @@ bool Disassembler::IsMovzMovnImm(unsigned reg_size, uint64_t value) {
   }
 
   // Test for movn: NOT(16-bits set at positions 0, 16, 32 or 48).
-  if ((reg_size == kXRegSize) &&
+  if ((reg_size == kXRegSizeInBits) &&
       (((value & 0xffffffffffff0000UL) == 0xffffffffffff0000UL) ||
        ((value & 0xffffffff0000ffffUL) == 0xffffffff0000ffffUL) ||
        ((value & 0xffff0000ffffffffUL) == 0xffff0000ffffffffUL) ||
        ((value & 0x0000ffffffffffffUL) == 0x0000ffffffffffffUL))) {
     return true;
   }
-  if ((reg_size == kWRegSize) &&
+  if ((reg_size == kWRegSizeInBits) &&
       (((value & 0xffff0000) == 0xffff0000) ||
        ((value & 0x0000ffff) == 0x0000ffff))) {
     return true;
@@ -447,7 +447,7 @@ void Disassembler::VisitBitfield(Instruction* instr) {
   unsigned s = instr->ImmS();
   unsigned r = instr->ImmR();
   unsigned rd_size_minus_1 =
-    ((instr->SixtyFourBits() == 1) ? kXRegSize : kWRegSize) - 1;
+    ((instr->SixtyFourBits() == 1) ? kXRegSizeInBits : kWRegSizeInBits) - 1;
   const char *mnemonic = "";
   const char *form = "";
   const char *form_shift_right = "'Rd, 'Rn, 'IBr";
@@ -1518,7 +1518,8 @@ int Disassembler::SubstituteBitfieldImmediateField(Instruction* instr,
     }
     case 'Z': {  // IBZ-r.
       ASSERT((format[3] == '-') && (format[4] == 'r'));
-      unsigned reg_size = (instr->SixtyFourBits() == 1) ? kXRegSize : kWRegSize;
+      unsigned reg_size = (instr->SixtyFourBits() == 1) ? kXRegSizeInBits
+                                                        : kWRegSizeInBits;
       AppendToOutput("#%d", reg_size - r);
       return 5;
     }