Subzero. X86. Uses pshufb for shufflevector lowering.

src/IceAssemblerX86BaseImpl.h

Index: src/IceAssemblerX86BaseImpl.h
diff --git a/src/IceAssemblerX86BaseImpl.h b/src/IceAssemblerX86BaseImpl.h
index a986515753637610dde2fd869d2f2a613a3978be..554f533cd94ab4f0d2cddb432e8a8d8a8288fe28 100644
--- a/src/IceAssemblerX86BaseImpl.h
+++ b/src/IceAssemblerX86BaseImpl.h
@@ -1535,6 +1535,31 @@ void AssemblerX86Base<TraitsType>::set1ps(XmmRegister dst, GPRRegister tmp1,
 }
 
 template <typename TraitsType>
+void AssemblerX86Base<TraitsType>::pshufb(Type /* Ty */, XmmRegister dst,
+                                          XmmRegister src) {
+  AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitUint8(0x66);
+  emitRexRB(RexTypeIrrelevant, dst, src);
+  emitUint8(0x0F);
+  emitUint8(0x38);
+  emitUint8(0x00);
+  emitXmmRegisterOperand(dst, src);
+}
+
+template <typename TraitsType>
+void AssemblerX86Base<TraitsType>::pshufb(Type /* Ty */, XmmRegister dst,
+                                          const Address &src) {
+  AssemblerBuffer::EnsureCapacity ensured(&Buffer);
+  emitUint8(0x66);
+  emitAddrSizeOverridePrefix();
+  emitRex(RexTypeIrrelevant, src, dst);
+  emitUint8(0x0F);
+  emitUint8(0x38);
+  emitUint8(0x00);
+  emitOperand(gprEncoding(dst), src);
+}
+
+template <typename TraitsType>
 void AssemblerX86Base<TraitsType>::pshufd(Type /* Ty */, XmmRegister dst,
                                           XmmRegister src,
                                           const Immediate &imm) {