Index: src/compiler/mips64/code-generator-mips64.cc |
diff --git a/src/compiler/mips64/code-generator-mips64.cc b/src/compiler/mips64/code-generator-mips64.cc |
index 73f15982379045e000477101f28ec2655ae852b6..db8adcec6b2592405496315be67dc6ddeccba643 100644 |
--- a/src/compiler/mips64/code-generator-mips64.cc |
+++ b/src/compiler/mips64/code-generator-mips64.cc |
@@ -359,7 +359,6 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate, |
} // namespace |
- |
#define ASSEMBLE_CHECKED_LOAD_FLOAT(width, asm_instr) \ |
do { \ |
auto result = i.Output##width##Register(); \ |
@@ -367,7 +366,8 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate, |
if (instr->InputAt(0)->IsRegister()) { \ |
auto offset = i.InputRegister(0); \ |
__ Branch(USE_DELAY_SLOT, ool->entry(), hs, offset, i.InputOperand(1)); \ |
- __ Daddu(kScratchReg, i.InputRegister(2), offset); \ |
+ __ And(kScratchReg, offset, Operand(0xffffffff)); \ |
+ __ Daddu(kScratchReg, i.InputRegister(2), kScratchReg); \ |
__ asm_instr(result, MemOperand(kScratchReg, 0)); \ |
} else { \ |
int offset = static_cast<int>(i.InputOperand(0).immediate()); \ |
@@ -377,7 +377,6 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate, |
__ bind(ool->exit()); \ |
} while (0) |
- |
#define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr) \ |
do { \ |
auto result = i.OutputRegister(); \ |
@@ -385,7 +384,8 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate, |
if (instr->InputAt(0)->IsRegister()) { \ |
auto offset = i.InputRegister(0); \ |
__ Branch(USE_DELAY_SLOT, ool->entry(), hs, offset, i.InputOperand(1)); \ |
- __ Daddu(kScratchReg, i.InputRegister(2), offset); \ |
+ __ And(kScratchReg, offset, Operand(0xffffffff)); \ |
+ __ Daddu(kScratchReg, i.InputRegister(2), kScratchReg); \ |
__ asm_instr(result, MemOperand(kScratchReg, 0)); \ |
} else { \ |
int offset = static_cast<int>(i.InputOperand(0).immediate()); \ |
@@ -395,7 +395,6 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate, |
__ bind(ool->exit()); \ |
} while (0) |
- |
#define ASSEMBLE_CHECKED_STORE_FLOAT(width, asm_instr) \ |
do { \ |
Label done; \ |
@@ -403,7 +402,8 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate, |
auto offset = i.InputRegister(0); \ |
auto value = i.Input##width##Register(2); \ |
__ Branch(USE_DELAY_SLOT, &done, hs, offset, i.InputOperand(1)); \ |
- __ Daddu(kScratchReg, i.InputRegister(3), offset); \ |
+ __ And(kScratchReg, offset, Operand(0xffffffff)); \ |
+ __ Daddu(kScratchReg, i.InputRegister(3), kScratchReg); \ |
__ asm_instr(value, MemOperand(kScratchReg, 0)); \ |
} else { \ |
int offset = static_cast<int>(i.InputOperand(0).immediate()); \ |
@@ -414,7 +414,6 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate, |
__ bind(&done); \ |
} while (0) |
- |
#define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr) \ |
do { \ |
Label done; \ |
@@ -422,7 +421,8 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate, |
auto offset = i.InputRegister(0); \ |
auto value = i.InputRegister(2); \ |
__ Branch(USE_DELAY_SLOT, &done, hs, offset, i.InputOperand(1)); \ |
- __ Daddu(kScratchReg, i.InputRegister(3), offset); \ |
+ __ And(kScratchReg, offset, Operand(0xffffffff)); \ |
+ __ Daddu(kScratchReg, i.InputRegister(3), kScratchReg); \ |
__ asm_instr(value, MemOperand(kScratchReg, 0)); \ |
} else { \ |
int offset = static_cast<int>(i.InputOperand(0).immediate()); \ |
@@ -433,7 +433,6 @@ FPUCondition FlagsConditionToConditionCmpFPU(bool& predicate, |
__ bind(&done); \ |
} while (0) |
- |
#define ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(mode) \ |
if (kArchVariant == kMips64r6) { \ |
__ cfc1(kScratchReg, FCSR); \ |
@@ -1491,6 +1490,9 @@ CodeGenerator::CodeGenResult CodeGenerator::AssembleArchInstruction( |
case kMips64Lw: |
__ lw(i.OutputRegister(), i.MemoryOperand()); |
break; |
+ case kMips64Lwu: |
+ __ lwu(i.OutputRegister(), i.MemoryOperand()); |
+ break; |
case kMips64Ld: |
__ ld(i.OutputRegister(), i.MemoryOperand()); |
break; |