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Side by Side Diff: src/compiler/mips64/code-generator-mips64.cc

Issue 1907363002: MIPS64: Fix [turbofan] Length and index2 are unsigned in CheckedLoad/CheckedStore. (Closed) Base URL: https://chromium.googlesource.com/v8/v8.git@master
Patch Set: Rebased. Created 4 years, 7 months ago
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1 // Copyright 2014 the V8 project authors. All rights reserved. 1 // Copyright 2014 the V8 project authors. All rights reserved.
2 // Use of this source code is governed by a BSD-style license that can be 2 // Use of this source code is governed by a BSD-style license that can be
3 // found in the LICENSE file. 3 // found in the LICENSE file.
4 4
5 #include "src/ast/scopes.h" 5 #include "src/ast/scopes.h"
6 #include "src/compiler/code-generator.h" 6 #include "src/compiler/code-generator.h"
7 #include "src/compiler/code-generator-impl.h" 7 #include "src/compiler/code-generator-impl.h"
8 #include "src/compiler/gap-resolver.h" 8 #include "src/compiler/gap-resolver.h"
9 #include "src/compiler/node-matchers.h" 9 #include "src/compiler/node-matchers.h"
10 #include "src/compiler/osr.h" 10 #include "src/compiler/osr.h"
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352 default: 352 default:
353 predicate = true; 353 predicate = true;
354 break; 354 break;
355 } 355 }
356 UNREACHABLE(); 356 UNREACHABLE();
357 return kNoFPUCondition; 357 return kNoFPUCondition;
358 } 358 }
359 359
360 } // namespace 360 } // namespace
361 361
362
363 #define ASSEMBLE_CHECKED_LOAD_FLOAT(width, asm_instr) \ 362 #define ASSEMBLE_CHECKED_LOAD_FLOAT(width, asm_instr) \
364 do { \ 363 do { \
365 auto result = i.Output##width##Register(); \ 364 auto result = i.Output##width##Register(); \
366 auto ool = new (zone()) OutOfLineLoad##width(this, result); \ 365 auto ool = new (zone()) OutOfLineLoad##width(this, result); \
367 if (instr->InputAt(0)->IsRegister()) { \ 366 if (instr->InputAt(0)->IsRegister()) { \
368 auto offset = i.InputRegister(0); \ 367 auto offset = i.InputRegister(0); \
369 __ Branch(USE_DELAY_SLOT, ool->entry(), hs, offset, i.InputOperand(1)); \ 368 __ Branch(USE_DELAY_SLOT, ool->entry(), hs, offset, i.InputOperand(1)); \
370 __ Daddu(kScratchReg, i.InputRegister(2), offset); \ 369 __ And(kScratchReg, offset, Operand(0xffffffff)); \
370 __ Daddu(kScratchReg, i.InputRegister(2), kScratchReg); \
371 __ asm_instr(result, MemOperand(kScratchReg, 0)); \ 371 __ asm_instr(result, MemOperand(kScratchReg, 0)); \
372 } else { \ 372 } else { \
373 int offset = static_cast<int>(i.InputOperand(0).immediate()); \ 373 int offset = static_cast<int>(i.InputOperand(0).immediate()); \
374 __ Branch(ool->entry(), ls, i.InputRegister(1), Operand(offset)); \ 374 __ Branch(ool->entry(), ls, i.InputRegister(1), Operand(offset)); \
375 __ asm_instr(result, MemOperand(i.InputRegister(2), offset)); \ 375 __ asm_instr(result, MemOperand(i.InputRegister(2), offset)); \
376 } \ 376 } \
377 __ bind(ool->exit()); \ 377 __ bind(ool->exit()); \
378 } while (0) 378 } while (0)
379 379
380
381 #define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr) \ 380 #define ASSEMBLE_CHECKED_LOAD_INTEGER(asm_instr) \
382 do { \ 381 do { \
383 auto result = i.OutputRegister(); \ 382 auto result = i.OutputRegister(); \
384 auto ool = new (zone()) OutOfLineLoadInteger(this, result); \ 383 auto ool = new (zone()) OutOfLineLoadInteger(this, result); \
385 if (instr->InputAt(0)->IsRegister()) { \ 384 if (instr->InputAt(0)->IsRegister()) { \
386 auto offset = i.InputRegister(0); \ 385 auto offset = i.InputRegister(0); \
387 __ Branch(USE_DELAY_SLOT, ool->entry(), hs, offset, i.InputOperand(1)); \ 386 __ Branch(USE_DELAY_SLOT, ool->entry(), hs, offset, i.InputOperand(1)); \
388 __ Daddu(kScratchReg, i.InputRegister(2), offset); \ 387 __ And(kScratchReg, offset, Operand(0xffffffff)); \
388 __ Daddu(kScratchReg, i.InputRegister(2), kScratchReg); \
389 __ asm_instr(result, MemOperand(kScratchReg, 0)); \ 389 __ asm_instr(result, MemOperand(kScratchReg, 0)); \
390 } else { \ 390 } else { \
391 int offset = static_cast<int>(i.InputOperand(0).immediate()); \ 391 int offset = static_cast<int>(i.InputOperand(0).immediate()); \
392 __ Branch(ool->entry(), ls, i.InputRegister(1), Operand(offset)); \ 392 __ Branch(ool->entry(), ls, i.InputRegister(1), Operand(offset)); \
393 __ asm_instr(result, MemOperand(i.InputRegister(2), offset)); \ 393 __ asm_instr(result, MemOperand(i.InputRegister(2), offset)); \
394 } \ 394 } \
395 __ bind(ool->exit()); \ 395 __ bind(ool->exit()); \
396 } while (0) 396 } while (0)
397 397
398
399 #define ASSEMBLE_CHECKED_STORE_FLOAT(width, asm_instr) \ 398 #define ASSEMBLE_CHECKED_STORE_FLOAT(width, asm_instr) \
400 do { \ 399 do { \
401 Label done; \ 400 Label done; \
402 if (instr->InputAt(0)->IsRegister()) { \ 401 if (instr->InputAt(0)->IsRegister()) { \
403 auto offset = i.InputRegister(0); \ 402 auto offset = i.InputRegister(0); \
404 auto value = i.Input##width##Register(2); \ 403 auto value = i.Input##width##Register(2); \
405 __ Branch(USE_DELAY_SLOT, &done, hs, offset, i.InputOperand(1)); \ 404 __ Branch(USE_DELAY_SLOT, &done, hs, offset, i.InputOperand(1)); \
406 __ Daddu(kScratchReg, i.InputRegister(3), offset); \ 405 __ And(kScratchReg, offset, Operand(0xffffffff)); \
406 __ Daddu(kScratchReg, i.InputRegister(3), kScratchReg); \
407 __ asm_instr(value, MemOperand(kScratchReg, 0)); \ 407 __ asm_instr(value, MemOperand(kScratchReg, 0)); \
408 } else { \ 408 } else { \
409 int offset = static_cast<int>(i.InputOperand(0).immediate()); \ 409 int offset = static_cast<int>(i.InputOperand(0).immediate()); \
410 auto value = i.Input##width##Register(2); \ 410 auto value = i.Input##width##Register(2); \
411 __ Branch(&done, ls, i.InputRegister(1), Operand(offset)); \ 411 __ Branch(&done, ls, i.InputRegister(1), Operand(offset)); \
412 __ asm_instr(value, MemOperand(i.InputRegister(3), offset)); \ 412 __ asm_instr(value, MemOperand(i.InputRegister(3), offset)); \
413 } \ 413 } \
414 __ bind(&done); \ 414 __ bind(&done); \
415 } while (0) 415 } while (0)
416 416
417
418 #define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr) \ 417 #define ASSEMBLE_CHECKED_STORE_INTEGER(asm_instr) \
419 do { \ 418 do { \
420 Label done; \ 419 Label done; \
421 if (instr->InputAt(0)->IsRegister()) { \ 420 if (instr->InputAt(0)->IsRegister()) { \
422 auto offset = i.InputRegister(0); \ 421 auto offset = i.InputRegister(0); \
423 auto value = i.InputRegister(2); \ 422 auto value = i.InputRegister(2); \
424 __ Branch(USE_DELAY_SLOT, &done, hs, offset, i.InputOperand(1)); \ 423 __ Branch(USE_DELAY_SLOT, &done, hs, offset, i.InputOperand(1)); \
425 __ Daddu(kScratchReg, i.InputRegister(3), offset); \ 424 __ And(kScratchReg, offset, Operand(0xffffffff)); \
425 __ Daddu(kScratchReg, i.InputRegister(3), kScratchReg); \
426 __ asm_instr(value, MemOperand(kScratchReg, 0)); \ 426 __ asm_instr(value, MemOperand(kScratchReg, 0)); \
427 } else { \ 427 } else { \
428 int offset = static_cast<int>(i.InputOperand(0).immediate()); \ 428 int offset = static_cast<int>(i.InputOperand(0).immediate()); \
429 auto value = i.InputRegister(2); \ 429 auto value = i.InputRegister(2); \
430 __ Branch(&done, ls, i.InputRegister(1), Operand(offset)); \ 430 __ Branch(&done, ls, i.InputRegister(1), Operand(offset)); \
431 __ asm_instr(value, MemOperand(i.InputRegister(3), offset)); \ 431 __ asm_instr(value, MemOperand(i.InputRegister(3), offset)); \
432 } \ 432 } \
433 __ bind(&done); \ 433 __ bind(&done); \
434 } while (0) 434 } while (0)
435 435
436
437 #define ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(mode) \ 436 #define ASSEMBLE_ROUND_DOUBLE_TO_DOUBLE(mode) \
438 if (kArchVariant == kMips64r6) { \ 437 if (kArchVariant == kMips64r6) { \
439 __ cfc1(kScratchReg, FCSR); \ 438 __ cfc1(kScratchReg, FCSR); \
440 __ li(at, Operand(mode_##mode)); \ 439 __ li(at, Operand(mode_##mode)); \
441 __ ctc1(at, FCSR); \ 440 __ ctc1(at, FCSR); \
442 __ rint_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \ 441 __ rint_d(i.OutputDoubleRegister(), i.InputDoubleRegister(0)); \
443 __ ctc1(kScratchReg, FCSR); \ 442 __ ctc1(kScratchReg, FCSR); \
444 } else { \ 443 } else { \
445 auto ool = new (zone()) OutOfLineRound(this, i.OutputDoubleRegister()); \ 444 auto ool = new (zone()) OutOfLineRound(this, i.OutputDoubleRegister()); \
446 Label done; \ 445 Label done; \
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1484 break; 1483 break;
1485 case kMips64Lh: 1484 case kMips64Lh:
1486 __ lh(i.OutputRegister(), i.MemoryOperand()); 1485 __ lh(i.OutputRegister(), i.MemoryOperand());
1487 break; 1486 break;
1488 case kMips64Sh: 1487 case kMips64Sh:
1489 __ sh(i.InputRegister(2), i.MemoryOperand()); 1488 __ sh(i.InputRegister(2), i.MemoryOperand());
1490 break; 1489 break;
1491 case kMips64Lw: 1490 case kMips64Lw:
1492 __ lw(i.OutputRegister(), i.MemoryOperand()); 1491 __ lw(i.OutputRegister(), i.MemoryOperand());
1493 break; 1492 break;
1493 case kMips64Lwu:
1494 __ lwu(i.OutputRegister(), i.MemoryOperand());
1495 break;
1494 case kMips64Ld: 1496 case kMips64Ld:
1495 __ ld(i.OutputRegister(), i.MemoryOperand()); 1497 __ ld(i.OutputRegister(), i.MemoryOperand());
1496 break; 1498 break;
1497 case kMips64Sw: 1499 case kMips64Sw:
1498 __ sw(i.InputRegister(2), i.MemoryOperand()); 1500 __ sw(i.InputRegister(2), i.MemoryOperand());
1499 break; 1501 break;
1500 case kMips64Sd: 1502 case kMips64Sd:
1501 __ sd(i.InputRegister(2), i.MemoryOperand()); 1503 __ sd(i.InputRegister(2), i.MemoryOperand());
1502 break; 1504 break;
1503 case kMips64Lwc1: { 1505 case kMips64Lwc1: {
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2230 padding_size -= v8::internal::Assembler::kInstrSize; 2232 padding_size -= v8::internal::Assembler::kInstrSize;
2231 } 2233 }
2232 } 2234 }
2233 } 2235 }
2234 2236
2235 #undef __ 2237 #undef __
2236 2238
2237 } // namespace compiler 2239 } // namespace compiler
2238 } // namespace internal 2240 } // namespace internal
2239 } // namespace v8 2241 } // namespace v8
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