| Index: src/ia32/lithium-codegen-ia32.cc
|
| diff --git a/src/ia32/lithium-codegen-ia32.cc b/src/ia32/lithium-codegen-ia32.cc
|
| index 6b6b5e6ebe52c9363738208a47a7c27cdd7dab40..96dda27b6c26d4c37d4b3fde47ef96eb68e5e1dd 100644
|
| --- a/src/ia32/lithium-codegen-ia32.cc
|
| +++ b/src/ia32/lithium-codegen-ia32.cc
|
| @@ -5760,45 +5760,6 @@ void LCodeGen::DoClampTToUint8NoSSE2(LClampTToUint8NoSSE2* instr) {
|
| }
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|
|
|
|
| -void LCodeGen::DoDoubleBits(LDoubleBits* instr) {
|
| - CpuFeatureScope scope(masm(), SSE2);
|
| - XMMRegister value_reg = ToDoubleRegister(instr->value());
|
| - Register result_reg = ToRegister(instr->result());
|
| - if (instr->hydrogen()->bits() == HDoubleBits::HIGH) {
|
| - if (CpuFeatures::IsSupported(SSE4_1)) {
|
| - CpuFeatureScope scope2(masm(), SSE4_1);
|
| - __ pextrd(result_reg, value_reg, 1);
|
| - } else {
|
| - XMMRegister xmm_scratch = double_scratch0();
|
| - __ pshufd(xmm_scratch, value_reg, 1);
|
| - __ movd(result_reg, xmm_scratch);
|
| - }
|
| - } else {
|
| - __ movd(result_reg, value_reg);
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| - }
|
| -}
|
| -
|
| -
|
| -void LCodeGen::DoConstructDouble(LConstructDouble* instr) {
|
| - Register hi_reg = ToRegister(instr->hi());
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| - Register lo_reg = ToRegister(instr->lo());
|
| - XMMRegister result_reg = ToDoubleRegister(instr->result());
|
| - CpuFeatureScope scope(masm(), SSE2);
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| -
|
| - if (CpuFeatures::IsSupported(SSE4_1)) {
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| - CpuFeatureScope scope2(masm(), SSE4_1);
|
| - __ movd(result_reg, lo_reg);
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| - __ pinsrd(result_reg, hi_reg, 1);
|
| - } else {
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| - XMMRegister xmm_scratch = double_scratch0();
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| - __ movd(result_reg, hi_reg);
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| - __ psllq(result_reg, 32);
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| - __ movd(xmm_scratch, lo_reg);
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| - __ orps(result_reg, xmm_scratch);
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| - }
|
| -}
|
| -
|
| -
|
| void LCodeGen::DoAllocate(LAllocate* instr) {
|
| class DeferredAllocate V8_FINAL : public LDeferredCode {
|
| public:
|
|
|