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1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Redistribution and use in source and binary forms, with or without | 2 // Redistribution and use in source and binary forms, with or without |
3 // modification, are permitted provided that the following conditions are | 3 // modification, are permitted provided that the following conditions are |
4 // met: | 4 // met: |
5 // | 5 // |
6 // * Redistributions of source code must retain the above copyright | 6 // * Redistributions of source code must retain the above copyright |
7 // notice, this list of conditions and the following disclaimer. | 7 // notice, this list of conditions and the following disclaimer. |
8 // * Redistributions in binary form must reproduce the above | 8 // * Redistributions in binary form must reproduce the above |
9 // copyright notice, this list of conditions and the following | 9 // copyright notice, this list of conditions and the following |
10 // disclaimer in the documentation and/or other materials provided | 10 // disclaimer in the documentation and/or other materials provided |
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5753 __ bind(&is_smi); | 5753 __ bind(&is_smi); |
5754 if (!input_reg.is(result_reg)) { | 5754 if (!input_reg.is(result_reg)) { |
5755 __ mov(result_reg, input_reg); | 5755 __ mov(result_reg, input_reg); |
5756 } | 5756 } |
5757 __ SmiUntag(result_reg); | 5757 __ SmiUntag(result_reg); |
5758 __ ClampUint8(result_reg); | 5758 __ ClampUint8(result_reg); |
5759 __ bind(&done); | 5759 __ bind(&done); |
5760 } | 5760 } |
5761 | 5761 |
5762 | 5762 |
5763 void LCodeGen::DoDoubleBits(LDoubleBits* instr) { | |
5764 CpuFeatureScope scope(masm(), SSE2); | |
5765 XMMRegister value_reg = ToDoubleRegister(instr->value()); | |
5766 Register result_reg = ToRegister(instr->result()); | |
5767 if (instr->hydrogen()->bits() == HDoubleBits::HIGH) { | |
5768 if (CpuFeatures::IsSupported(SSE4_1)) { | |
5769 CpuFeatureScope scope2(masm(), SSE4_1); | |
5770 __ pextrd(result_reg, value_reg, 1); | |
5771 } else { | |
5772 XMMRegister xmm_scratch = double_scratch0(); | |
5773 __ pshufd(xmm_scratch, value_reg, 1); | |
5774 __ movd(result_reg, xmm_scratch); | |
5775 } | |
5776 } else { | |
5777 __ movd(result_reg, value_reg); | |
5778 } | |
5779 } | |
5780 | |
5781 | |
5782 void LCodeGen::DoConstructDouble(LConstructDouble* instr) { | |
5783 Register hi_reg = ToRegister(instr->hi()); | |
5784 Register lo_reg = ToRegister(instr->lo()); | |
5785 XMMRegister result_reg = ToDoubleRegister(instr->result()); | |
5786 CpuFeatureScope scope(masm(), SSE2); | |
5787 | |
5788 if (CpuFeatures::IsSupported(SSE4_1)) { | |
5789 CpuFeatureScope scope2(masm(), SSE4_1); | |
5790 __ movd(result_reg, lo_reg); | |
5791 __ pinsrd(result_reg, hi_reg, 1); | |
5792 } else { | |
5793 XMMRegister xmm_scratch = double_scratch0(); | |
5794 __ movd(result_reg, hi_reg); | |
5795 __ psllq(result_reg, 32); | |
5796 __ movd(xmm_scratch, lo_reg); | |
5797 __ orps(result_reg, xmm_scratch); | |
5798 } | |
5799 } | |
5800 | |
5801 | |
5802 void LCodeGen::DoAllocate(LAllocate* instr) { | 5763 void LCodeGen::DoAllocate(LAllocate* instr) { |
5803 class DeferredAllocate V8_FINAL : public LDeferredCode { | 5764 class DeferredAllocate V8_FINAL : public LDeferredCode { |
5804 public: | 5765 public: |
5805 DeferredAllocate(LCodeGen* codegen, | 5766 DeferredAllocate(LCodeGen* codegen, |
5806 LAllocate* instr, | 5767 LAllocate* instr, |
5807 const X87Stack& x87_stack) | 5768 const X87Stack& x87_stack) |
5808 : LDeferredCode(codegen, x87_stack), instr_(instr) { } | 5769 : LDeferredCode(codegen, x87_stack), instr_(instr) { } |
5809 virtual void Generate() V8_OVERRIDE { | 5770 virtual void Generate() V8_OVERRIDE { |
5810 codegen()->DoDeferredAllocate(instr_); | 5771 codegen()->DoDeferredAllocate(instr_); |
5811 } | 5772 } |
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6322 FixedArray::kHeaderSize - kPointerSize)); | 6283 FixedArray::kHeaderSize - kPointerSize)); |
6323 __ bind(&done); | 6284 __ bind(&done); |
6324 } | 6285 } |
6325 | 6286 |
6326 | 6287 |
6327 #undef __ | 6288 #undef __ |
6328 | 6289 |
6329 } } // namespace v8::internal | 6290 } } // namespace v8::internal |
6330 | 6291 |
6331 #endif // V8_TARGET_ARCH_IA32 | 6292 #endif // V8_TARGET_ARCH_IA32 |
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