MIPS: [wasm] Implement Int32MulPair operator.

src/mips/macro-assembler-mips.cc

Index: src/mips/macro-assembler-mips.cc
diff --git a/src/mips/macro-assembler-mips.cc b/src/mips/macro-assembler-mips.cc
index 02f7bee24811f9280148137a2df53782e9508855..5a97a5807d6424cebde64b90bcc5b060906db63d 100644
--- a/src/mips/macro-assembler-mips.cc
+++ b/src/mips/macro-assembler-mips.cc
@@ -804,6 +804,47 @@ void MacroAssembler::Mul(Register rd_hi, Register rd_lo,
   }
 }
 
+void MacroAssembler::Mulu(Register rd_hi, Register rd_lo, Register rs,
+                          const Operand& rt) {
+  if (rt.is_reg()) {
+    if (!IsMipsArchVariant(kMips32r6)) {
+      multu(rs, rt.rm());
+      mflo(rd_lo);
+      mfhi(rd_hi);
+    } else {
+      if (rd_lo.is(rs)) {
+        DCHECK(!rd_hi.is(rs));
+        DCHECK(!rd_hi.is(rt.rm()) && !rd_lo.is(rt.rm()));
+        muhu(rd_hi, rs, rt.rm());
+        mulu(rd_lo, rs, rt.rm());
+      } else {
+        DCHECK(!rd_hi.is(rt.rm()) && !rd_lo.is(rt.rm()));
+        mulu(rd_lo, rs, rt.rm());
+        muhu(rd_hi, rs, rt.rm());
+      }
+    }
+  } else {
+    // li handles the relocation.
+    DCHECK(!rs.is(at));
+    li(at, rt);
+    if (!IsMipsArchVariant(kMips32r6)) {
+      multu(rs, at);
+      mflo(rd_lo);
+      mfhi(rd_hi);
+    } else {
+      if (rd_lo.is(rs)) {
+        DCHECK(!rd_hi.is(rs));
+        DCHECK(!rd_hi.is(at) && !rd_lo.is(at));
+        muhu(rd_hi, rs, at);
+        mulu(rd_lo, rs, at);
+      } else {
+        DCHECK(!rd_hi.is(at) && !rd_lo.is(at));
+        mulu(rd_lo, rs, at);
+        muhu(rd_hi, rs, at);
+      }
+    }
+  }
+}

[balazs.kilvady, 2016/04/01 12:16:21]

The 2 blocks are almost identical. What do you think about a simpler struct
like:
Register reg;
if (rt.is_reg()) {
  reg = rt.rm();
} else {
  reg = at;
  li(reg, rt);
}
// The 2nd block using reg <-> at. 

[Marija Antic, 2016/04/05 07:50:04]

Done.

 
 void MacroAssembler::Mulh(Register rd, Register rs, const Operand& rt) {
   if (rt.is_reg()) {