Adds support for integer division for ARM chips without the sdiv instruction.

runtime/vm/assembler_arm.cc

Index: runtime/vm/assembler_arm.cc
===================================================================
--- runtime/vm/assembler_arm.cc	(revision 24627)
+++ runtime/vm/assembler_arm.cc	(working copy)
@@ -1943,6 +1943,25 @@
 }
 
 
+void Assembler::IntegerDivide(Register result, Register left, Register right,
+                              DRegister tmpl, DRegister tmpr) {
+  // tmpl can't be DTMP because we subsequently use STMP, but tmpr can be
+  // DTMP because we do the divide immediately after writing it.
+  ASSERT(tmpl != DTMP);
+  if (CPUFeatures::integer_division_supported()) {
+    sdiv(result, left, right);
+  } else {
+    vmovsr(STMP, left);

[regis, 2013/07/01 16:54:09]

STMP -> static_cast<SRegister>(2 * tmpl)
ditto for the right operand.

[zra, 2013/07/01 17:43:46]

Done.

+    vcvtdi(tmpl, STMP);  // left is in tmpl.
+    vmovsr(STMP, right);
+    vcvtdi(tmpr, STMP);  // right is in tmpr.
+    vdivd(tmpr, tmpl, tmpr);
+    vcvtid(STMP, tmpr);
+    vmovrs(result, STMP);
+  }
+}
+
+
 static int NumRegsBelowFP(RegList regs) {
   int count = 0;
   for (int i = 0; i < FP; i++) {