Ensure Schedules generated by the RawMachineAssembler are in edge-split form

src/compiler/instruction-selector.cc

Index: src/compiler/instruction-selector.cc
diff --git a/src/compiler/instruction-selector.cc b/src/compiler/instruction-selector.cc
index 91900be25c30dabec502028de1401680631509ae..b8615df7489f7ab114d1b88abc78f78cd67669e4 100644
--- a/src/compiler/instruction-selector.cc
+++ b/src/compiler/instruction-selector.cc
@@ -787,7 +787,17 @@ void InstructionSelector::VisitControl(BasicBlock* block) {
       SwitchInfo sw;
       // Last successor must be Default.
       sw.default_branch = block->successors().back();
-      DCHECK_EQ(IrOpcode::kIfDefault, sw.default_branch->front()->opcode());
+      BasicBlock* branch = sw.default_branch;
+      // The scheduler may have inserted a split-edge block between the switch
+      // and the default label, skip it if necessary.
+      if (branch->size() == 0) {
+        DCHECK_EQ(BasicBlock::kGoto, branch->control());
+        DCHECK_EQ(1, branch->SuccessorCount());
+        DCHECK_EQ(1, branch->PredecessorCount());
+        branch = branch->SuccessorAt(0);
+      }
+      USE(branch);
+      DCHECK_EQ(IrOpcode::kIfDefault, branch->front()->opcode());
       // All other successors must be cases.
       sw.case_count = block->SuccessorCount() - 1;
       sw.case_branches = &block->successors().front();
@@ -796,7 +806,15 @@ void InstructionSelector::VisitControl(BasicBlock* block) {
       sw.min_value = std::numeric_limits<int32_t>::max();
       sw.max_value = std::numeric_limits<int32_t>::min();
       for (size_t index = 0; index < sw.case_count; ++index) {
-        BasicBlock* branch = sw.case_branches[index];
+        branch = sw.case_branches[index];
+        // The scheduler may have inserted a split-edge block between the switch

[titzer, 2016/03/21 08:06:03]

Not sure this is sound. The split-edge blocks are the placement points for phi
resolution moves, so they can't be skipped.

[danno, 2016/03/22 07:53:44]

As discussed, moved the logic to ensure the extra edge to the Switch-building
logic in the RawMachineAssembler.

+        // and the label, skip it if necessary.
+        if (branch->size() == 0) {
+          DCHECK_EQ(BasicBlock::kGoto, branch->control());
+          DCHECK_EQ(1, branch->SuccessorCount());
+          DCHECK_EQ(1, branch->PredecessorCount());
+          branch = branch->SuccessorAt(0);
+        }
         int32_t value = OpParameter<int32_t>(branch->front()->op());
         sw.case_values[index] = value;
         if (sw.min_value > value) sw.min_value = value;