Ensure Schedules generated by the RawMachineAssembler are in edge-split form

src/compiler/instruction-selector.cc

 // Copyright 2014 the V8 project authors. All rights reserved.
 // Use of this source code is governed by a BSD-style license that can be
 // found in the LICENSE file.
 
 #include "src/compiler/instruction-selector.h"
 
 #include <limits>
 
 #include "src/base/adapters.h"
 #include "src/compiler/instruction-selector-impl.h"
@@ skipping 769 matching lines @@
       BasicBlock* tbranch = block->SuccessorAt(0);
       BasicBlock* fbranch = block->SuccessorAt(1);
       if (tbranch == fbranch) return VisitGoto(tbranch);
       return VisitBranch(input, tbranch, fbranch);
     }
     case BasicBlock::kSwitch: {
       DCHECK_EQ(IrOpcode::kSwitch, input->opcode());
       SwitchInfo sw;
       // Last successor must be Default.
       sw.default_branch = block->successors().back();
-      DCHECK_EQ(IrOpcode::kIfDefault, sw.default_branch->front()->opcode());
+      BasicBlock* branch = sw.default_branch;
+      // The scheduler may have inserted a split-edge block between the switch
+      // and the default label, skip it if necessary.
+      if (branch->size() == 0) {
+        DCHECK_EQ(BasicBlock::kGoto, branch->control());
+        DCHECK_EQ(1, branch->SuccessorCount());
+        DCHECK_EQ(1, branch->PredecessorCount());
+        branch = branch->SuccessorAt(0);
+      }
+      USE(branch);
+      DCHECK_EQ(IrOpcode::kIfDefault, branch->front()->opcode());
       // All other successors must be cases.
       sw.case_count = block->SuccessorCount() - 1;
       sw.case_branches = &block->successors().front();
       // Determine case values and their min/max.
       sw.case_values = zone()->NewArray<int32_t>(sw.case_count);
       sw.min_value = std::numeric_limits<int32_t>::max();
       sw.max_value = std::numeric_limits<int32_t>::min();
       for (size_t index = 0; index < sw.case_count; ++index) {
-        BasicBlock* branch = sw.case_branches[index];
+        branch = sw.case_branches[index];
+        // The scheduler may have inserted a split-edge block between the switch

[titzer, 2016/03/21 08:06:03]

Not sure this is sound. The split-edge blocks are the placement points for phi
resolution moves, so they can't be skipped.

[danno, 2016/03/22 07:53:44]

As discussed, moved the logic to ensure the extra edge to the Switch-building
logic in the RawMachineAssembler.

+        // and the label, skip it if necessary.
+        if (branch->size() == 0) {
+          DCHECK_EQ(BasicBlock::kGoto, branch->control());
+          DCHECK_EQ(1, branch->SuccessorCount());
+          DCHECK_EQ(1, branch->PredecessorCount());
+          branch = branch->SuccessorAt(0);
+        }
         int32_t value = OpParameter<int32_t>(branch->front()->op());
         sw.case_values[index] = value;
         if (sw.min_value > value) sw.min_value = value;
         if (sw.max_value < value) sw.max_value = value;
       }
       DCHECK_LE(sw.min_value, sw.max_value);
       // Note that {value_range} can be 0 if {min_value} is -2^31 and
       // {max_value}
       // is 2^31-1, so don't assume that it's non-zero below.
       sw.value_range = 1u + bit_cast<uint32_t>(sw.max_value) -
@@ skipping 975 matching lines @@
   return new (instruction_zone()) FrameStateDescriptor(
       instruction_zone(), state_info.type(), state_info.bailout_id(),
       state_info.state_combine(), parameters, locals, stack,
       state_info.shared_info(), outer_state);
 }
 
 
 }  // namespace compiler
 }  // namespace internal
 }  // namespace v8