MIPS: Replace JR/JALR with JIC/JIALC for r6 part 2

src/full-codegen/mips/full-codegen-mips.cc

Index: src/full-codegen/mips/full-codegen-mips.cc
diff --git a/src/full-codegen/mips/full-codegen-mips.cc b/src/full-codegen/mips/full-codegen-mips.cc
index d4e80052fde0469d8ff066aaef69bb4ef0c42cab..36f6b32c5c915890dd9a67e9b06cb457e60fd17d 100644
--- a/src/full-codegen/mips/full-codegen-mips.cc
+++ b/src/full-codegen/mips/full-codegen-mips.cc
@@ -4147,7 +4147,12 @@ void BackEdgeTable::PatchAt(Code* unoptimized_code,
                             BackEdgeState target_state,
                             Code* replacement_code) {
   static const int kInstrSize = Assembler::kInstrSize;
-  Address branch_address = pc - 6 * kInstrSize;
+  Address branch_address;
+  if (IsMipsArchVariant(kMips32r6)) {
+    branch_address = pc - 5 * kInstrSize;

[ivica.bogosavljevic, 2016/03/21 15:30:48]

Instead of 5 and 6, is it possible to have here named constants which have
different values for different architectures? 5 and 6 or 3 or 4 doesn't mean
much.
In that case, there wouldn't be these branching depending on architecutre

[balazs.kilvady, 2016/03/24 12:12:47]

Could kCallTargetAddressOffset and other constants from assembler-mips.h be used
here? They are already arch-specific.

[miran.karic, 2016/03/24 15:34:01]

Done.

[miran.karic, 2016/03/24 15:34:01]

Done.

+  } else {
+    branch_address = pc - 6 * kInstrSize;
+  }
   Isolate* isolate = unoptimized_code->GetIsolate();
   CodePatcher patcher(isolate, branch_address, 1);
 
@@ -4174,7 +4179,12 @@ void BackEdgeTable::PatchAt(Code* unoptimized_code,
       patcher.masm()->addiu(at, zero_reg, 1);
       break;
   }
-  Address pc_immediate_load_address = pc - 4 * kInstrSize;
+  Address pc_immediate_load_address;
+  if (IsMipsArchVariant(kMips32r6)) {
+    pc_immediate_load_address = pc - 3 * kInstrSize;

[ivica.bogosavljevic, 2016/03/21 15:30:48]

Same as above

[miran.karic, 2016/03/24 15:34:01]

Done.

+  } else {
+    pc_immediate_load_address = pc - 4 * kInstrSize;
+  }
   // Replace the stack check address in the load-immediate (lui/ori pair)
   // with the entry address of the replacement code.
   Assembler::set_target_address_at(isolate, pc_immediate_load_address,
@@ -4190,10 +4200,18 @@ BackEdgeTable::BackEdgeState BackEdgeTable::GetBackEdgeState(
     Code* unoptimized_code,
     Address pc) {
   static const int kInstrSize = Assembler::kInstrSize;
-  Address branch_address = pc - 6 * kInstrSize;
-  Address pc_immediate_load_address = pc - 4 * kInstrSize;
+  Address branch_address;
+  Address pc_immediate_load_address;
+  if (IsMipsArchVariant(kMips32r6)) {
+    branch_address = pc - 5 * kInstrSize;
+    pc_immediate_load_address = pc - 3 * kInstrSize;
+    DCHECK(Assembler::IsBeq(Assembler::instr_at(pc - 4 * kInstrSize)));
+  } else {
+    branch_address = pc - 6 * kInstrSize;
+    pc_immediate_load_address = pc - 4 * kInstrSize;
+    DCHECK(Assembler::IsBeq(Assembler::instr_at(pc - 5 * kInstrSize)));
+  }
 
-  DCHECK(Assembler::IsBeq(Assembler::instr_at(pc - 5 * kInstrSize)));
   if (!Assembler::IsAddImmediate(Assembler::instr_at(branch_address))) {
     DCHECK(reinterpret_cast<uint32_t>(
         Assembler::target_address_at(pc_immediate_load_address)) ==