| Index: runtime/vm/disassembler_arm.cc
|
| ===================================================================
|
| --- runtime/vm/disassembler_arm.cc (revision 24544)
|
| +++ runtime/vm/disassembler_arm.cc (working copy)
|
| @@ -638,6 +638,11 @@
|
| Format(instr, "umull'cond's 'rd, 'rn, 'rm, 'rs");
|
| break;
|
| }
|
| + case 5: {
|
| + // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
|
| + Format(instr, "umlal'cond's 'rd, 'rn, 'rm, 'rs");
|
| + break;
|
| + }
|
| case 6: {
|
| // Registers rd_lo, rd_hi, rn, rm are encoded as rd, rn, rm, rs.
|
| Format(instr, "smull'cond's 'rd, 'rn, 'rm, 'rs");
|
|
|