Fix a warning about inline asm source/destination mismatches for cache_type_register_.

src/base/cpu.cc

Index: src/base/cpu.cc
diff --git a/src/base/cpu.cc b/src/base/cpu.cc
index 4aad47be28203eafe0729f1d921765bb4d1b248b..43afbea3878bc60b66b8bca42e3a51ca9cc4ce8c 100644
--- a/src/base/cpu.cc
+++ b/src/base/cpu.cc
@@ -85,7 +85,7 @@ class CacheLineSizes {
     cache_type_register_ = 0;
 #else
     // Copy the content of the cache type register to a core register.
-    __asm__ __volatile__("mrs %[ctr], ctr_el0"  // NOLINT
+    __asm__ __volatile__("mrs %x[ctr], ctr_el0"  // NOLINT
                          : [ctr] "=r"(cache_type_register_));
 #endif
   }