[turbofan] Fix register constraint for memory barrier.

[turbofan] Fix register constraint for memory barrier.

After fixing the memory barrier for maps (https://codereview.chromium.org/1714513003), we are using a temp register for the map case. The temp register should not be aliased with the stored value (otherwise we perform the mem barrier check with a wrong value). This CL makes sure it is not aliased.

BUG=chromium:590074
LOG=n

Committed: https://crrev.com/9867a8a26ecf3247fd73890ccf34fbc5776ed689
Cr-Commit-Position: refs/heads/master@{#34607}

[Jarin, 2016-03-08 19:17:51]

jarin@chromium.org changed reviewers:
+ mstarzinger@chromium.org, ulan@chromium.org

[Jarin, 2016-03-08 19:17:51]

Could you take a look, please?

[Benedikt Meurer, 2016-03-08 19:19:50]

bmeurer@chromium.org changed reviewers:
+ bmeurer@chromium.org

[Benedikt Meurer, 2016-03-08 19:19:50]

Nice. LGTM

[Jarin, 2016-03-08 19:26:50]

The CQ bit was checked by jarin@chromium.org

[commit-bot: I haz the power, 2016-03-08 19:27:00]

CQ is trying da patch. Follow status at
 https://chromium-cq-status.appspot.com/patch-status/1775083002/1
View timeline at
 https://chromium-cq-status.appspot.com/patch-timeline/1775083002/1

[commit-bot: I haz the power, 2016-03-08 19:31:51]

The CQ bit was unchecked by commit-bot@chromium.org

[commit-bot: I haz the power, 2016-03-08 19:31:52]

Try jobs failed on following builders:
  v8_presubmit on tryserver.v8 (JOB_FAILED,
http://build.chromium.org/p/tryserver.v8/builders/v8_presubmit/builds/12047)

[Jarin, 2016-03-09 08:29:54]

Description was changed from

==========
[turbofan] Fix register constraint for ARM memory barrier.

BUG=chromium:590074
==========

to

==========
[turbofan] Fix register constraint for memory barrier.

After fixing the memory barrier for maps
(https://codereview.chromium.org/1714513003), we are using a temp register for
the map case. The temp register should not be aliased with the stored value
(otherwise we perform the mem barrier check with a wrong value). This CL makes
sure it is not aliased.

BUG=chromium:590074
LOG=n
==========

[Michael Starzinger, 2016-03-09 09:08:16]

LGTM. Ouch, nice catch!

[Jarin, 2016-03-09 09:12:05]

The CQ bit was checked by jarin@chromium.org

[Jarin, 2016-03-09 09:12:05]

The patchset sent to the CQ was uploaded after l-g-t-m from bmeurer@chromium.org
Link to the patchset: https://codereview.chromium.org/1775083002/#ps20001
(title: "Fix other platforms, too")

[commit-bot: I haz the power, 2016-03-09 09:12:11]

CQ is trying da patch. Follow status at
 https://chromium-cq-status.appspot.com/patch-status/1775083002/20001
View timeline at
 https://chromium-cq-status.appspot.com/patch-timeline/1775083002/20001

[commit-bot: I haz the power, 2016-03-09 09:13:53]

Description was changed from

==========
[turbofan] Fix register constraint for memory barrier.

After fixing the memory barrier for maps
(https://codereview.chromium.org/1714513003), we are using a temp register for
the map case. The temp register should not be aliased with the stored value
(otherwise we perform the mem barrier check with a wrong value). This CL makes
sure it is not aliased.

BUG=chromium:590074
LOG=n
==========

to

==========
[turbofan] Fix register constraint for memory barrier.

After fixing the memory barrier for maps
(https://codereview.chromium.org/1714513003), we are using a temp register for
the map case. The temp register should not be aliased with the stored value
(otherwise we perform the mem barrier check with a wrong value). This CL makes
sure it is not aliased.

BUG=chromium:590074
LOG=n
==========

[commit-bot: I haz the power, 2016-03-09 09:13:54]

Committed patchset #2 (id:20001)

[commit-bot: I haz the power, 2016-03-09 09:39:55]

Description was changed from

==========
[turbofan] Fix register constraint for memory barrier.

After fixing the memory barrier for maps
(https://codereview.chromium.org/1714513003), we are using a temp register for
the map case. The temp register should not be aliased with the stored value
(otherwise we perform the mem barrier check with a wrong value). This CL makes
sure it is not aliased.

BUG=chromium:590074
LOG=n
==========

to

==========
[turbofan] Fix register constraint for memory barrier.

After fixing the memory barrier for maps
(https://codereview.chromium.org/1714513003), we are using a temp register for
the map case. The temp register should not be aliased with the stored value
(otherwise we perform the mem barrier check with a wrong value). This CL makes
sure it is not aliased.

BUG=chromium:590074
LOG=n

Committed: https://crrev.com/9867a8a26ecf3247fd73890ccf34fbc5776ed689
Cr-Commit-Position: refs/heads/master@{#34607}
==========

[commit-bot: I haz the power, 2016-03-09 09:39:56]

Patchset 2 (id:??) landed as
https://crrev.com/9867a8a26ecf3247fd73890ccf34fbc5776ed689
Cr-Commit-Position: refs/heads/master@{#34607}