Use TRUNC.W instead of CVT.W on mips to convert from double to int as to not

runtime/vm/assembler_mips_test.cc

Index: runtime/vm/assembler_mips_test.cc
diff --git a/runtime/vm/assembler_mips_test.cc b/runtime/vm/assembler_mips_test.cc
index e3cad3d6a91c1266688f625e4c81cce0588d144c..645d62131774b493a5e59fd9d1c79ec4b8b4cb38 100644
--- a/runtime/vm/assembler_mips_test.cc
+++ b/runtime/vm/assembler_mips_test.cc
@@ -1976,107 +1976,65 @@ ASSEMBLER_TEST_RUN(Cop1COLE_not_taken, test) {
 }
 
 
-ASSEMBLER_TEST_GENERATE(Cop1CvtDW, assembler) {
-  __ LoadImmediate(T0, 42);
-  __ mtc1(T0, F2);
-  __ cvtdw(D0, F2);
+ASSEMBLER_TEST_GENERATE(Cop1TruncWD, assembler) {
+  __ LoadImmediate(D1, 42.9);
+  __ truncwd(F0, D1);
+  __ mfc1(V0, F0);
   __ Ret();
 }
 
 
-ASSEMBLER_TEST_RUN(Cop1CvtDW, test) {
-  typedef double (*SimpleCode)() DART_UNUSED;
+ASSEMBLER_TEST_RUN(Cop1TruncWD, test) {
+  typedef int (*SimpleCode)() DART_UNUSED;
   EXPECT(test != NULL);
-  double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
-  EXPECT_FLOAT_EQ(42.0, res, 0.001);
+  EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 
-ASSEMBLER_TEST_GENERATE(Cop1CvtDW_neg, assembler) {
-  __ LoadImmediate(T0, -42);
-  __ mtc1(T0, F2);
-  __ cvtdw(D0, F2);
+ASSEMBLER_TEST_GENERATE(Cop1TruncWD_neg, assembler) {
+  __ LoadImmediate(D1, -42.9);
+  __ truncwd(F0, D1);
+  __ mfc1(V0, F0);
   __ Ret();
 }
 
 
-ASSEMBLER_TEST_RUN(Cop1CvtDW_neg, test) {
-  typedef double (*SimpleCode)() DART_UNUSED;
+ASSEMBLER_TEST_RUN(Cop1TruncWD_neg, test) {
+  typedef int (*SimpleCode)() DART_UNUSED;
   EXPECT(test != NULL);
-  double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
-  EXPECT_FLOAT_EQ(-42.0, res, 0.001);
+  EXPECT_EQ(-42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
 }
 
 

[rmacnak, 2016/03/03 22:12:02]

Add one of the inf/nan/overflow cases.

[regis, 2016/03/03 23:14:48]

Done.

-ASSEMBLER_TEST_GENERATE(Cop1CvtDL, assembler) {
-  if (TargetCPUFeatures::mips_version() == MIPS32r2) {
-    __ LoadImmediate(T0, 0x1);
-    __ mtc1(ZR, F2);
-    __ mtc1(T0, F3);  // D0 <- 0x100000000 = 4294967296
-    __ cvtdl(D0, D1);
-  } else {
-    __ LoadImmediate(D0, 4294967296.0);
-  }
+ASSEMBLER_TEST_GENERATE(Cop1CvtDW, assembler) {
+  __ LoadImmediate(T0, 42);
+  __ mtc1(T0, F2);
+  __ cvtdw(D0, F2);
   __ Ret();
 }
 
 
-ASSEMBLER_TEST_RUN(Cop1CvtDL, test) {
+ASSEMBLER_TEST_RUN(Cop1CvtDW, test) {
   typedef double (*SimpleCode)() DART_UNUSED;
   EXPECT(test != NULL);
   double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
-  EXPECT_FLOAT_EQ(4294967296.0, res, 0.001);
+  EXPECT_FLOAT_EQ(42.0, res, 0.001);
 }
 
 
-ASSEMBLER_TEST_GENERATE(Cop1CvtDL_neg, assembler) {
-  if (TargetCPUFeatures::mips_version() == MIPS32r2) {
-    __ LoadImmediate(T0, 0xffffffff);
-    __ mtc1(T0, F2);
-    __ mtc1(T0, F3);  // D0 <- 0xffffffffffffffff = -1
-    __ cvtdl(D0, D1);
-  } else {
-    __ LoadImmediate(D0, -1.0);
-  }
+ASSEMBLER_TEST_GENERATE(Cop1CvtDW_neg, assembler) {
+  __ LoadImmediate(T0, -42);
+  __ mtc1(T0, F2);
+  __ cvtdw(D0, F2);
   __ Ret();
 }
 
 
-ASSEMBLER_TEST_RUN(Cop1CvtDL_neg, test) {
+ASSEMBLER_TEST_RUN(Cop1CvtDW_neg, test) {
   typedef double (*SimpleCode)() DART_UNUSED;
   EXPECT(test != NULL);
   double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
-  EXPECT_FLOAT_EQ(-1.0, res, 0.001);
-}
-
-
-ASSEMBLER_TEST_GENERATE(Cop1CvtWD, assembler) {
-  __ LoadImmediate(D1, 42.0);
-  __ cvtwd(F0, D1);
-  __ mfc1(V0, F0);
-  __ Ret();
-}
-
-
-ASSEMBLER_TEST_RUN(Cop1CvtWD, test) {
-  typedef int (*SimpleCode)() DART_UNUSED;
-  EXPECT(test != NULL);
-  EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
-}
-
-
-ASSEMBLER_TEST_GENERATE(Cop1CvtWD_neg, assembler) {
-  __ LoadImmediate(D1, -42.0);
-  __ cvtwd(F0, D1);
-  __ mfc1(V0, F0);
-  __ Ret();
-}
-
-
-ASSEMBLER_TEST_RUN(Cop1CvtWD_neg, test) {
-  typedef int (*SimpleCode)() DART_UNUSED;
-  EXPECT(test != NULL);
-  EXPECT_EQ(-42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
+  EXPECT_FLOAT_EQ(-42.0, res, 0.001);
 }