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Side by Side Diff: runtime/vm/assembler_mips_test.cc

Issue 1765623002: Use TRUNC.W instead of CVT.W on mips to convert from double to int as to not (Closed) Base URL: git@github.com:dart-lang/sdk.git@master
Patch Set: Created 4 years, 9 months ago
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1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file 1 // Copyright (c) 2013, the Dart project authors. Please see the AUTHORS file
2 // for details. All rights reserved. Use of this source code is governed by a 2 // for details. All rights reserved. Use of this source code is governed by a
3 // BSD-style license that can be found in the LICENSE file. 3 // BSD-style license that can be found in the LICENSE file.
4 4
5 #include "vm/globals.h" 5 #include "vm/globals.h"
6 #if defined(TARGET_ARCH_MIPS) 6 #if defined(TARGET_ARCH_MIPS)
7 7
8 #include "vm/assembler.h" 8 #include "vm/assembler.h"
9 #include "vm/cpu.h" 9 #include "vm/cpu.h"
10 #include "vm/os.h" 10 #include "vm/os.h"
(...skipping 1958 matching lines...) Expand 10 before | Expand all | Expand 10 after
1969 __ Ret(); 1969 __ Ret();
1970 } 1970 }
1971 1971
1972 1972
1973 ASSEMBLER_TEST_RUN(Cop1COLE_not_taken, test) { 1973 ASSEMBLER_TEST_RUN(Cop1COLE_not_taken, test) {
1974 typedef int (*SimpleCode)() DART_UNUSED; 1974 typedef int (*SimpleCode)() DART_UNUSED;
1975 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry())); 1975 EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1976 } 1976 }
1977 1977
1978 1978
1979 ASSEMBLER_TEST_GENERATE(Cop1TruncWD, assembler) {
1980 __ LoadImmediate(D1, 42.9);
1981 __ truncwd(F0, D1);
1982 __ mfc1(V0, F0);
1983 __ Ret();
1984 }
1985
1986
1987 ASSEMBLER_TEST_RUN(Cop1TruncWD, test) {
1988 typedef int (*SimpleCode)() DART_UNUSED;
1989 EXPECT(test != NULL);
1990 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
1991 }
1992
1993
1994 ASSEMBLER_TEST_GENERATE(Cop1TruncWD_neg, assembler) {
1995 __ LoadImmediate(D1, -42.9);
1996 __ truncwd(F0, D1);
1997 __ mfc1(V0, F0);
1998 __ Ret();
1999 }
2000
2001
2002 ASSEMBLER_TEST_RUN(Cop1TruncWD_neg, test) {
2003 typedef int (*SimpleCode)() DART_UNUSED;
2004 EXPECT(test != NULL);
2005 EXPECT_EQ(-42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2006 }
2007
2008
rmacnak 2016/03/03 22:12:02 Add one of the inf/nan/overflow cases.
regis 2016/03/03 23:14:48 Done.
1979 ASSEMBLER_TEST_GENERATE(Cop1CvtDW, assembler) { 2009 ASSEMBLER_TEST_GENERATE(Cop1CvtDW, assembler) {
1980 __ LoadImmediate(T0, 42); 2010 __ LoadImmediate(T0, 42);
1981 __ mtc1(T0, F2); 2011 __ mtc1(T0, F2);
1982 __ cvtdw(D0, F2); 2012 __ cvtdw(D0, F2);
1983 __ Ret(); 2013 __ Ret();
1984 } 2014 }
1985 2015
1986 2016
1987 ASSEMBLER_TEST_RUN(Cop1CvtDW, test) { 2017 ASSEMBLER_TEST_RUN(Cop1CvtDW, test) {
1988 typedef double (*SimpleCode)() DART_UNUSED; 2018 typedef double (*SimpleCode)() DART_UNUSED;
(...skipping 12 matching lines...) Expand all
2001 2031
2002 2032
2003 ASSEMBLER_TEST_RUN(Cop1CvtDW_neg, test) { 2033 ASSEMBLER_TEST_RUN(Cop1CvtDW_neg, test) {
2004 typedef double (*SimpleCode)() DART_UNUSED; 2034 typedef double (*SimpleCode)() DART_UNUSED;
2005 EXPECT(test != NULL); 2035 EXPECT(test != NULL);
2006 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry()); 2036 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
2007 EXPECT_FLOAT_EQ(-42.0, res, 0.001); 2037 EXPECT_FLOAT_EQ(-42.0, res, 0.001);
2008 } 2038 }
2009 2039
2010 2040
2011 ASSEMBLER_TEST_GENERATE(Cop1CvtDL, assembler) {
2012 if (TargetCPUFeatures::mips_version() == MIPS32r2) {
2013 __ LoadImmediate(T0, 0x1);
2014 __ mtc1(ZR, F2);
2015 __ mtc1(T0, F3); // D0 <- 0x100000000 = 4294967296
2016 __ cvtdl(D0, D1);
2017 } else {
2018 __ LoadImmediate(D0, 4294967296.0);
2019 }
2020 __ Ret();
2021 }
2022
2023
2024 ASSEMBLER_TEST_RUN(Cop1CvtDL, test) {
2025 typedef double (*SimpleCode)() DART_UNUSED;
2026 EXPECT(test != NULL);
2027 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
2028 EXPECT_FLOAT_EQ(4294967296.0, res, 0.001);
2029 }
2030
2031
2032 ASSEMBLER_TEST_GENERATE(Cop1CvtDL_neg, assembler) {
2033 if (TargetCPUFeatures::mips_version() == MIPS32r2) {
2034 __ LoadImmediate(T0, 0xffffffff);
2035 __ mtc1(T0, F2);
2036 __ mtc1(T0, F3); // D0 <- 0xffffffffffffffff = -1
2037 __ cvtdl(D0, D1);
2038 } else {
2039 __ LoadImmediate(D0, -1.0);
2040 }
2041 __ Ret();
2042 }
2043
2044
2045 ASSEMBLER_TEST_RUN(Cop1CvtDL_neg, test) {
2046 typedef double (*SimpleCode)() DART_UNUSED;
2047 EXPECT(test != NULL);
2048 double res = EXECUTE_TEST_CODE_DOUBLE(SimpleCode, test->entry());
2049 EXPECT_FLOAT_EQ(-1.0, res, 0.001);
2050 }
2051
2052
2053 ASSEMBLER_TEST_GENERATE(Cop1CvtWD, assembler) {
2054 __ LoadImmediate(D1, 42.0);
2055 __ cvtwd(F0, D1);
2056 __ mfc1(V0, F0);
2057 __ Ret();
2058 }
2059
2060
2061 ASSEMBLER_TEST_RUN(Cop1CvtWD, test) {
2062 typedef int (*SimpleCode)() DART_UNUSED;
2063 EXPECT(test != NULL);
2064 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2065 }
2066
2067
2068 ASSEMBLER_TEST_GENERATE(Cop1CvtWD_neg, assembler) {
2069 __ LoadImmediate(D1, -42.0);
2070 __ cvtwd(F0, D1);
2071 __ mfc1(V0, F0);
2072 __ Ret();
2073 }
2074
2075
2076 ASSEMBLER_TEST_RUN(Cop1CvtWD_neg, test) {
2077 typedef int (*SimpleCode)() DART_UNUSED;
2078 EXPECT(test != NULL);
2079 EXPECT_EQ(-42, EXECUTE_TEST_CODE_INT32(SimpleCode, test->entry()));
2080 }
2081
2082
2083 ASSEMBLER_TEST_GENERATE(Cop1CvtSD, assembler) { 2041 ASSEMBLER_TEST_GENERATE(Cop1CvtSD, assembler) {
2084 __ LoadImmediate(D2, -42.42); 2042 __ LoadImmediate(D2, -42.42);
2085 __ cvtsd(F2, D2); 2043 __ cvtsd(F2, D2);
2086 __ cvtds(D0, F2); 2044 __ cvtds(D0, F2);
2087 __ Ret(); 2045 __ Ret();
2088 } 2046 }
2089 2047
2090 2048
2091 ASSEMBLER_TEST_RUN(Cop1CvtSD, test) { 2049 ASSEMBLER_TEST_RUN(Cop1CvtSD, test) {
2092 typedef double (*SimpleCode)() DART_UNUSED; 2050 typedef double (*SimpleCode)() DART_UNUSED;
(...skipping 96 matching lines...) Expand 10 before | Expand all | Expand 10 after
2189 ASSEMBLER_TEST_RUN(Semaphore, test) { 2147 ASSEMBLER_TEST_RUN(Semaphore, test) {
2190 EXPECT(test != NULL); 2148 EXPECT(test != NULL);
2191 typedef int (*Semaphore)() DART_UNUSED; 2149 typedef int (*Semaphore)() DART_UNUSED;
2192 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Semaphore, test->entry())); 2150 EXPECT_EQ(42, EXECUTE_TEST_CODE_INT32(Semaphore, test->entry()));
2193 } 2151 }
2194 2152
2195 2153
2196 } // namespace dart 2154 } // namespace dart
2197 2155
2198 #endif // defined TARGET_ARCH_MIPS 2156 #endif // defined TARGET_ARCH_MIPS
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