[turbofan] SSA Validation

Validate that instruction selection maintains SSA form.

It benefits certain algorithms in register allocation to assume the input is
SSA - understanding that ResolvePhis in the regalloc pipeline lowers
phis, thus blurring the SSA invariant.

BUG=

Committed: https://crrev.com/a59605efdae202c25e8328c6e5bedd7b6905f7e9
Cr-Commit-Position: refs/heads/master@{#34509}

[Mircea Trofin, 2016-03-04 02:44:30]

Description was changed from

==========
SSA Validation

BUG=
==========

to

==========
Validate that instruction selection maintains SSA form. 

It benefits certain algorithms in register allocation to assume the input is
SSA - understanding that ResolvePhis in the regalloc pipeline lowers 
phis, thus blurring the SSA invariant.

BUG=
==========

[Mircea Trofin, 2016-03-04 02:44:30]

mtrofin@chromium.org changed reviewers:
+ bmeurer@chromium.org

[Mircea Trofin, 2016-03-04 02:45:41]

Note that the change is just patch 1, the other 2 are the add with
overflow fixes.

[Mircea Trofin, 2016-03-04 19:26:42]

mtrofin@chromium.org changed reviewers:
+ titzer@chromium.org

[titzer, 2016-03-04 19:46:29]

lgtm

[Mircea Trofin, 2016-03-04 20:05:22]

The CQ bit was checked by mtrofin@chromium.org

[Mircea Trofin, 2016-03-04 20:05:22]

The patchset sent to the CQ was uploaded after l-g-t-m from titzer@chromium.org
Link to the patchset: https://codereview.chromium.org/1760323002/#ps60001
(title: "just ssa validation, after other fixed made it in")

[commit-bot: I haz the power, 2016-03-04 20:05:28]

CQ is trying da patch. Follow status at
 https://chromium-cq-status.appspot.com/patch-status/1760323002/60001
View timeline at
 https://chromium-cq-status.appspot.com/patch-timeline/1760323002/60001

[commit-bot: I haz the power, 2016-03-04 20:32:38]

Description was changed from

==========
Validate that instruction selection maintains SSA form. 

It benefits certain algorithms in register allocation to assume the input is
SSA - understanding that ResolvePhis in the regalloc pipeline lowers 
phis, thus blurring the SSA invariant.

BUG=
==========

to

==========
Validate that instruction selection maintains SSA form. 

It benefits certain algorithms in register allocation to assume the input is
SSA - understanding that ResolvePhis in the regalloc pipeline lowers 
phis, thus blurring the SSA invariant.

BUG=
==========

[commit-bot: I haz the power, 2016-03-04 20:32:39]

Committed patchset #4 (id:60001)

[commit-bot: I haz the power, 2016-03-04 20:34:14]

Description was changed from

==========
Validate that instruction selection maintains SSA form. 

It benefits certain algorithms in register allocation to assume the input is
SSA - understanding that ResolvePhis in the regalloc pipeline lowers 
phis, thus blurring the SSA invariant.

BUG=
==========

to

==========
Validate that instruction selection maintains SSA form.

It benefits certain algorithms in register allocation to assume the input is
SSA - understanding that ResolvePhis in the regalloc pipeline lowers
phis, thus blurring the SSA invariant.

BUG=

Committed: https://crrev.com/a59605efdae202c25e8328c6e5bedd7b6905f7e9
Cr-Commit-Position: refs/heads/master@{#34509}
==========

[commit-bot: I haz the power, 2016-03-04 20:34:15]

Patchset 4 (id:??) landed as
https://crrev.com/a59605efdae202c25e8328c6e5bedd7b6905f7e9
Cr-Commit-Position: refs/heads/master@{#34509}