Index: pydir/gen_arm32_reg_tables.py |
diff --git a/pydir/gen_arm32_reg_tables.py b/pydir/gen_arm32_reg_tables.py |
index 22846499bc08651263b5673a01d98b45423ea2c3..40b61e582e7c7a06ddb025614d3c1d8518755e39 100644 |
--- a/pydir/gen_arm32_reg_tables.py |
+++ b/pydir/gen_arm32_reg_tables.py |
@@ -221,9 +221,9 @@ print ("// This file was auto generated by the {script} script.\n" |
"#define SUBZERO_SRC_ICEREGISTERSARM32_DEF\n".format(script=os.path.basename(sys.argv[0]))) |
for Name, RegClass in RegClasses: |
- print '\n//{xmacro}'.format(xmacro=Reg.DefiningXMacro()) |
+ print '//{xmacro}'.format(xmacro=Reg.DefiningXMacro()) |
print "#define REGARM32_%s_TABLE" % Name, |
for Reg in RegClass: |
- print '\\\n X({Reg})'.format(Reg=Reg), |
+ sys.stdout.write(' \\\n X({Reg})'.format(Reg=Reg)) |
print '\n' |
print "#endif // SUBZERO_SRC_ICEREGISTERSARM32_DEF", |