Chromium Code Reviews
chromiumcodereview-hr@appspot.gserviceaccount.com (chromiumcodereview-hr) | Please choose your nickname with Settings | Help | Chromium Project | Gerrit Changes | Sign out
(30)

Issues Search
    My Issues | Starred     Open | Closed | All

Unified Diff: src/IceTargetLoweringX8632Traits.h

Issue 1676123002: Subzero: Use a proper RegNumT type instead of int32_t/SizeT. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Revert some method name changes Created 4 years, 10 months ago
Use n/p to move between diff chunks; N/P to move between comments. Draft comments are only viewable by you.
Jump to:
View side-by-side diff with in-line comments
Download patch
« src/IceRegAlloc.cpp ('K') | « src/IceTargetLoweringMIPS32.cpp ('k') | src/IceTargetLoweringX8664.cpp » ('j') | src/IceTargetLoweringX8664Traits.h » ('J')
Expand Comments ('e') | Collapse Comments ('c') | Show Comments Hide Comments ('s')
Index: src/IceTargetLoweringX8632Traits.h
diff --git a/src/IceTargetLoweringX8632Traits.h b/src/IceTargetLoweringX8632Traits.h
index 53d50fbe2087946631136dba027d861b515fc635..7d275e5bd5342bc46622e568d3315e753f39eb29 100644
--- a/src/IceTargetLoweringX8632Traits.h
+++ b/src/IceTargetLoweringX8632Traits.h
@@ -68,8 +68,8 @@ struct TargetX8632Traits {
using Cond = ::Ice::CondX86;
using RegisterSet = ::Ice::RegX8632;
- static constexpr SizeT StackPtr = RegX8632::Reg_esp;
- static constexpr SizeT FramePtr = RegX8632::Reg_ebp;
+ static constexpr auto StackPtr = RegX8632::Reg_esp;
+ static constexpr auto FramePtr = RegX8632::Reg_ebp;
static constexpr GPRRegister Encoded_Reg_Accumulator =
RegX8632::Encoded_Reg_eax;
static constexpr GPRRegister Encoded_Reg_Counter = RegX8632::Encoded_Reg_ecx;
@@ -276,7 +276,7 @@ struct TargetX8632Traits {
static const char *TargetName;
static constexpr Type WordType = IceType_i32;
- static IceString getRegName(int32_t RegNum) {
+ static IceString getRegName(RegNumT RegNum) {
static const char *const RegNames[RegisterSet::Reg_NUM] = {
#define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
@@ -285,12 +285,11 @@ struct TargetX8632Traits {
REGX8632_TABLE
#undef X
};
- assert(RegNum >= 0);
- assert(RegNum < RegisterSet::Reg_NUM);
+ RegNum.assertIsValid();
return RegNames[RegNum];
}
- static GPRRegister getEncodedGPR(int32_t RegNum) {
+ static GPRRegister getEncodedGPR(RegNumT RegNum) {
static const GPRRegister GPRRegs[RegisterSet::Reg_NUM] = {
#define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
@@ -299,13 +298,12 @@ struct TargetX8632Traits {
REGX8632_TABLE
#undef X
};
- assert(RegNum >= 0);
- assert(RegNum < RegisterSet::Reg_NUM);
+ RegNum.assertIsValid();
assert(GPRRegs[RegNum] != GPRRegister::Encoded_Not_GPR);
return GPRRegs[RegNum];
}
- static ByteRegister getEncodedByteReg(int32_t RegNum) {
+ static ByteRegister getEncodedByteReg(RegNumT RegNum) {
static const ByteRegister ByteRegs[RegisterSet::Reg_NUM] = {
#define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
@@ -314,13 +312,12 @@ struct TargetX8632Traits {
REGX8632_TABLE
#undef X
};
- assert(RegNum >= 0);
- assert(RegNum < RegisterSet::Reg_NUM);
+ RegNum.assertIsValid();
assert(ByteRegs[RegNum] != ByteRegister::Encoded_Not_ByteReg);
return ByteRegs[RegNum];
}
- static XmmRegister getEncodedXmm(int32_t RegNum) {
+ static XmmRegister getEncodedXmm(RegNumT RegNum) {
static const XmmRegister XmmRegs[RegisterSet::Reg_NUM] = {
#define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
@@ -329,13 +326,12 @@ struct TargetX8632Traits {
REGX8632_TABLE
#undef X
};
- assert(RegNum >= 0);
- assert(RegNum < RegisterSet::Reg_NUM);
+ RegNum.assertIsValid();
assert(XmmRegs[RegNum] != XmmRegister::Encoded_Not_Xmm);
return XmmRegs[RegNum];
}
- static uint32_t getEncoding(int32_t RegNum) {
+ static uint32_t getEncoding(RegNumT RegNum) {
static const uint32_t Encoding[RegisterSet::Reg_NUM] = {
#define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
@@ -344,13 +340,12 @@ struct TargetX8632Traits {
REGX8632_TABLE
#undef X
};
- assert(RegNum >= 0);
- assert(RegNum < RegisterSet::Reg_NUM);
+ RegNum.assertIsValid();
return Encoding[RegNum];
}
- static int32_t getBaseReg(int32_t RegNum) {
- static const int32_t BaseRegs[RegisterSet::Reg_NUM] = {
+ static RegNumT getBaseReg(RegNumT RegNum) {
+ static const RegNumT BaseRegs[RegisterSet::Reg_NUM] = {
#define X(val, encode, name, base, scratch, preserved, stackptr, frameptr, \
isGPR, is64, is32, is16, is8, isXmm, is64To8, is32To8, is16To8, \
isTrunc8Rcvr, isAhRcvr, aliases) \
@@ -358,13 +353,12 @@ struct TargetX8632Traits {
REGX8632_TABLE
#undef X
};
- assert(RegNum >= 0);
- assert(RegNum < RegisterSet::Reg_NUM);
+ RegNum.assertIsValid();
return BaseRegs[RegNum];
}
private:
- static int32_t getFirstGprForType(Type Ty) {
+ static RegisterSet::AllRegisters getFirstGprForType(Type Ty) {
switch (Ty) {
default:
llvm_unreachable("Invalid type for GPR.");
@@ -380,8 +374,8 @@ private:
public:
// Return a register in RegNum's alias set that is suitable for Ty.
- static int32_t getGprForType(Type Ty, int32_t RegNum) {
- assert(RegNum != Variable::NoRegister);
+ static RegNumT getGprForType(Type Ty, RegNumT RegNum) {
+ assert(RegNum != RegNumT::NoRegister);
if (!isScalarIntegerType(Ty)) {
return RegNum;
@@ -399,7 +393,7 @@ public:
return RegNum;
}
- const int32_t FirstGprForType = getFirstGprForType(Ty);
+ const RegisterSet::AllRegisters FirstGprForType = getFirstGprForType(Ty);
switch (RegNum) {
default:
@@ -412,14 +406,14 @@ public:
return RegisterSet::val; \
assert((is32) || (is16) || (is8) || \
getBaseReg(RegisterSet::val) == RegisterSet::Reg_esp); \
- constexpr int32_t FirstGprWithRegNumSize = \
+ constexpr RegisterSet::AllRegisters FirstGprWithRegNumSize = \
(((is32) || RegisterSet::val == RegisterSet::Reg_esp) \
? RegisterSet::Reg_eax \
: (((is16) || RegisterSet::val == RegisterSet::Reg_sp) \
? RegisterSet::Reg_ax \
: RegisterSet::Reg_al)); \
- const int32_t NewRegNum = \
- RegNum - FirstGprWithRegNumSize + FirstGprForType; \
+ const RegNumT NewRegNum = \
+ RegNumT::fixme(RegNum - FirstGprWithRegNumSize + FirstGprForType); \
assert(getBaseReg(RegNum) == getBaseReg(NewRegNum) && \
"Error involving " #val); \
return NewRegNum; \
@@ -580,7 +574,7 @@ public:
static void
makeRandomRegisterPermutation(GlobalContext *Ctx, Cfg *Func,
- llvm::SmallVectorImpl<int32_t> &Permutation,
+ llvm::SmallVectorImpl<RegNumT> &Permutation,
const llvm::SmallBitVector &ExcludeRegisters,
uint64_t Salt) {
// TODO(stichnot): Declaring Permutation this way loses type/size
@@ -590,7 +584,7 @@ public:
// class. For x86-32, this would comprise the 8 XMM registers. This is for
// performance, not correctness.
static const unsigned MaxEquivalenceClassSize = 8;
- using RegisterList = llvm::SmallVector<int32_t, MaxEquivalenceClassSize>;
+ using RegisterList = llvm::SmallVector<RegNumT, MaxEquivalenceClassSize>;
using EquivalenceClassMap = std::map<uint32_t, RegisterList>;
EquivalenceClassMap EquivalenceClasses;
SizeT NumShuffled = 0, NumPreserved = 0;
@@ -652,7 +646,7 @@ public:
Str << "{";
const RegisterList &List = I.second;
bool First = true;
- for (int32_t Register : List) {
+ for (RegNumT Register : List) {
if (!First)
Str << " ";
First = false;
@@ -663,11 +657,11 @@ public:
}
}
- static int32_t getRaxOrDie() {
+ static RegNumT getRaxOrDie() {
llvm::report_fatal_error("no rax in non-64-bit mode.");
}
- static int32_t getRdxOrDie() {
+ static RegNumT getRdxOrDie() {
llvm::report_fatal_error("no rdx in non-64-bit mode.");
}
@@ -687,21 +681,21 @@ public:
/// Whether scalar floating point arguments are passed in XMM registers
static constexpr bool X86_PASS_SCALAR_FP_IN_XMM = false;
/// Get the register for a given argument slot in the XMM registers.
- static int32_t getRegisterForXmmArgNum(uint32_t ArgNum) {
+ static RegNumT getRegisterForXmmArgNum(uint32_t ArgNum) {
// TODO(sehr): Change to use the CCArg technique used in ARM32.
static_assert(RegisterSet::Reg_xmm0 + 1 == RegisterSet::Reg_xmm1,
"Inconsistency between XMM register numbers and ordinals");
if (ArgNum >= X86_MAX_XMM_ARGS) {
- return Variable::NoRegister;
+ return RegNumT::NoRegister;
}
- return static_cast<int32_t>(RegisterSet::Reg_xmm0 + ArgNum);
+ return RegNumT::fixme(RegisterSet::Reg_xmm0 + ArgNum);
}
/// Get the register for a given argument slot in the GPRs.
- static int32_t getRegisterForGprArgNum(Type Ty, uint32_t ArgNum) {
+ static RegNumT getRegisterForGprArgNum(Type Ty, uint32_t ArgNum) {
assert(Ty == IceType_i64 || Ty == IceType_i32);
(void)Ty;
(void)ArgNum;
- return Variable::NoRegister;
+ return RegNumT::NoRegister;
}
/// The number of bits in a byte
« src/IceRegAlloc.cpp ('K') | « src/IceTargetLoweringMIPS32.cpp ('k') | src/IceTargetLoweringX8664.cpp » ('j') | src/IceTargetLoweringX8664Traits.h » ('J')

Powered by Google App Engine
This is Rietveld 408576698