| Index: lib/Target/ARM/MCTargetDesc/ARMMCNaClExpander.cpp
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| diff --git a/lib/Target/ARM/MCTargetDesc/ARMMCNaClExpander.cpp b/lib/Target/ARM/MCTargetDesc/ARMMCNaClExpander.cpp
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| index 02d18c2f71d680e3fc5de6daf24f32e77c5761a0..f31e4a206b9e2618f49fce991c46fe373d14d085 100644
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| --- a/lib/Target/ARM/MCTargetDesc/ARMMCNaClExpander.cpp
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| +++ b/lib/Target/ARM/MCTargetDesc/ARMMCNaClExpander.cpp
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| @@ -356,8 +356,10 @@ void ARM::ARMMCNaClExpander::expandLoadStore(const MCInst &Inst,
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|    case ARM::STMDB_UPD:
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|    case ARM::STMIB_UPD:
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|  
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| +  case ARM::VSTMDIA:
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|    case ARM::VSTMDIA_UPD:
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|    case ARM::VSTMDDB_UPD:
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| +  case ARM::VSTMSIA:
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|    case ARM::VSTMSIA_UPD:
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|    case ARM::VSTMSDB_UPD:
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|  
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| @@ -366,8 +368,10 @@ void ARM::ARMMCNaClExpander::expandLoadStore(const MCInst &Inst,
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|    case ARM::LDMDB_UPD:
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|    case ARM::LDMIB_UPD:
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|  
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| +  case ARM::VLDMDIA:
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|    case ARM::VLDMDIA_UPD:
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|    case ARM::VLDMDDB_UPD:
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| +  case ARM::VLDMSIA:
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|    case ARM::VLDMSIA_UPD:
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|    case ARM::VLDMSDB_UPD:
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|  
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| @@ -382,6 +386,9 @@ void ARM::ARMMCNaClExpander::expandLoadStore(const MCInst &Inst,
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|    case ARM::LDMIB:
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|      return sandboxBaseDisp(Inst, *InstInfo, Inst.getOperand(0).getReg(), Out,
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|                             STI);
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| +  case ARM::DMB:
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| +    // DMB is mayLoad but has no memory operands and needs no sandboxing
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| +    return Out.EmitInstruction(Inst, STI);
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|    }
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|  
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|    int MemIdx = getMemIdx(Inst, *InstInfo);
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| 
 |