Removes ARM mrc instruction.

runtime/vm/assembler_arm_test.cc

Index: runtime/vm/assembler_arm_test.cc
===================================================================
--- runtime/vm/assembler_arm_test.cc	(revision 23311)
+++ runtime/vm/assembler_arm_test.cc	(working copy)
@@ -1418,70 +1418,6 @@
 }
 
 
-// Check that assembler mrc instruction encoding, and simulator decoding
-// are in agreement.
-#if defined(USING_SIMULATOR)
-ASSEMBLER_TEST_GENERATE(MrcHaveDiv, assembler) {
-  __ mrc(R0, 15, 0, 0, 2, 0);  // Accesses ID_ISAR0.
-  // Bits 24 - 27 describe the presence of integer division. Bit 24 is set if
-  // it is available in the Thumb instruction set. Bit 25 is set if it is
-  // available both in Thumb and in the ARM instruction set.
-  __ Lsr(R0, R0, 24);
-  __ and_(R0, R0, ShifterOperand(0xf));
-  __ bx(LR);
-}
-
-
-ASSEMBLER_TEST_RUN(MrcHaveDiv, test) {
-  EXPECT(test != NULL);
-  typedef int (*Tst)();
-  bool b = CPUFeatures::integer_division_supported();
-  CPUFeatures::set_integer_division_supported(true);
-  EXPECT_EQ(2, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
-  CPUFeatures::set_integer_division_supported(b);
-}
-
-
-ASSEMBLER_TEST_GENERATE(MrcNoDiv, assembler) {
-  __ mrc(R0, 15, 0, 0, 2, 0);
-  __ Lsr(R0, R0, 24);
-  __ and_(R0, R0, ShifterOperand(0xf));
-  __ bx(LR);
-}
-
-
-ASSEMBLER_TEST_RUN(MrcNoDiv, test) {
-  EXPECT(test != NULL);
-  typedef int (*Tst)();
-  bool b = CPUFeatures::integer_division_supported();
-  CPUFeatures::set_integer_division_supported(false);
-  EXPECT_EQ(0, EXECUTE_TEST_CODE_INT32(Tst, test->entry()));
-  CPUFeatures::set_integer_division_supported(b);
-}
-
-
-ASSEMBLER_TEST_GENERATE(MrcReal, assembler) {
-  __ mrc(R0, 15, 0, 0, 2, 0);
-  __ Lsr(R0, R0, 24);
-  __ and_(R0, R0, ShifterOperand(0xf));
-  __ bx(LR);
-}
-
-
-ASSEMBLER_TEST_RUN(MrcReal, test) {
-  EXPECT(test != NULL);
-  typedef int (*Tst)();
-  bool have_div = CPUFeatures::integer_division_supported();
-  int32_t r = EXECUTE_TEST_CODE_INT32(Tst, test->entry());
-  if (have_div) {
-    EXPECT_EQ(2, r);
-  } else {
-    EXPECT_EQ(0, r);
-  }
-}
-#endif  // defined(USING_SIMULATOR)
-
-
 ASSEMBLER_TEST_GENERATE(Udiv, assembler) {
   if (CPUFeatures::integer_division_supported()) {
     __ mov(R0, ShifterOperand(27));