[MIPS] Fix memory barriers for atomic operations.

base/atomicops_internals_mips_gcc.h

Index: base/atomicops_internals_mips_gcc.h
diff --git a/base/atomicops_internals_mips_gcc.h b/base/atomicops_internals_mips_gcc.h
index 505597e74ff23587ba0b427c5b9db20efdac3467..32d73de38b8e331d4effe3aca8616d28e9ee36cf 100644
--- a/base/atomicops_internals_mips_gcc.h
+++ b/base/atomicops_internals_mips_gcc.h
@@ -90,9 +90,9 @@ inline Atomic32 NoBarrier_AtomicIncrement(volatile Atomic32* ptr,
 
 inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
                                         Atomic32 increment) {
-  ATOMICOPS_COMPILER_BARRIER();
+  MemoryBarrier();
   Atomic32 res = NoBarrier_AtomicIncrement(ptr, increment);
-  ATOMICOPS_COMPILER_BARRIER();
+  MemoryBarrier();
   return res;
 }
 
@@ -105,18 +105,16 @@ inline Atomic32 Barrier_AtomicIncrement(volatile Atomic32* ptr,
 inline Atomic32 Acquire_CompareAndSwap(volatile Atomic32* ptr,
                                        Atomic32 old_value,
                                        Atomic32 new_value) {
-  ATOMICOPS_COMPILER_BARRIER();
+  MemoryBarrier();

[Dmitry Vyukov, 2013/06/06 08:14:44]

It must be the other way around:
For acquire: memory operation followed by barrier.
For release: memory operation preceded by barrier.

[paul.l..., 2013/06/06 17:07:03]

Done. Thanks for the review!

   Atomic32 res = NoBarrier_CompareAndSwap(ptr, old_value, new_value);
-  ATOMICOPS_COMPILER_BARRIER();
   return res;
 }
 
 inline Atomic32 Release_CompareAndSwap(volatile Atomic32* ptr,
                                        Atomic32 old_value,
                                        Atomic32 new_value) {
-  ATOMICOPS_COMPILER_BARRIER();
   Atomic32 res = NoBarrier_CompareAndSwap(ptr, old_value, new_value);
-  ATOMICOPS_COMPILER_BARRIER();
+  MemoryBarrier();
   return res;
 }