| Index: src/utils.h
|
| diff --git a/src/utils.h b/src/utils.h
|
| index 1ea2d56fbfd44c4b139871bd29fd64cac104eb1d..1d4d27b302af57bb9416521c693868b8d30aa513 100644
|
| --- a/src/utils.h
|
| +++ b/src/utils.h
|
| @@ -1715,75 +1715,47 @@ inline uintptr_t GetCurrentStackPosition() {
|
| return limit;
|
| }
|
|
|
| -static inline double ReadDoubleValue(const void* p) {
|
| -#ifndef V8_TARGET_ARCH_MIPS
|
| - return *reinterpret_cast<const double*>(p);
|
| +template <typename V>
|
| +static inline V ReadUnalignedValue(const void* p) {
|
| +#if !(V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64)
|
| + return *reinterpret_cast<const V*>(p);
|
| +#else
|
| + V r;
|
| + memmove(&r, p, sizeof(V));
|
| + return r;
|
| +#endif // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
|
| +}
|
| +
|
| +template <typename V>
|
| +static inline void WriteUnalignedValue(void* p, V value) {
|
| +#if !(V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64)
|
| + *(reinterpret_cast<V*>(p)) = value;
|
| #else // V8_TARGET_ARCH_MIPS
|
| - // Prevent compiler from using load-double (mips ldc1) on (possibly)
|
| - // non-64-bit aligned address.
|
| - union conversion {
|
| - double d;
|
| - uint32_t u[2];
|
| - } c;
|
| - const uint32_t* ptr = reinterpret_cast<const uint32_t*>(p);
|
| - c.u[0] = *ptr;
|
| - c.u[1] = *(ptr + 1);
|
| - return c.d;
|
| -#endif // V8_TARGET_ARCH_MIPS
|
| + memmove(p, &value, sizeof(V));
|
| +#endif // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
|
| +}
|
| +
|
| +static inline double ReadDoubleValue(const void* p) {
|
| + return ReadUnalignedValue<double>(p);
|
| }
|
|
|
|
|
| static inline void WriteDoubleValue(void* p, double value) {
|
| -#ifndef V8_TARGET_ARCH_MIPS
|
| - *(reinterpret_cast<double*>(p)) = value;
|
| -#else // V8_TARGET_ARCH_MIPS
|
| - // Prevent compiler from using load-double (mips sdc1) on (possibly)
|
| - // non-64-bit aligned address.
|
| - union conversion {
|
| - double d;
|
| - uint32_t u[2];
|
| - } c;
|
| - c.d = value;
|
| - uint32_t* ptr = reinterpret_cast<uint32_t*>(p);
|
| - *ptr = c.u[0];
|
| - *(ptr + 1) = c.u[1];
|
| -#endif // V8_TARGET_ARCH_MIPS
|
| + WriteUnalignedValue(p, value);
|
| }
|
|
|
|
|
| static inline uint16_t ReadUnalignedUInt16(const void* p) {
|
| -#if !(V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64)
|
| - return *reinterpret_cast<const uint16_t*>(p);
|
| -#else // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
|
| - // Prevent compiler from using load-half (mips lh) on (possibly)
|
| - // non-16-bit aligned address.
|
| - union conversion {
|
| - uint16_t h;
|
| - uint8_t b[2];
|
| - } c;
|
| - const uint8_t* ptr = reinterpret_cast<const uint8_t*>(p);
|
| - c.b[0] = *ptr;
|
| - c.b[1] = *(ptr + 1);
|
| - return c.h;
|
| -#endif // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
|
| + return ReadUnalignedValue<uint16_t>(p);
|
| }
|
|
|
|
|
| static inline void WriteUnalignedUInt16(void* p, uint16_t value) {
|
| -#if !(V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64)
|
| - *(reinterpret_cast<uint16_t*>(p)) = value;
|
| -#else // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
|
| - // Prevent compiler from using store-half (mips sh) on (possibly)
|
| - // non-16-bit aligned address.
|
| - union conversion {
|
| - uint16_t h;
|
| - uint8_t b[2];
|
| - } c;
|
| - c.h = value;
|
| - uint8_t* ptr = reinterpret_cast<uint8_t*>(p);
|
| - *ptr = c.b[0];
|
| - *(ptr + 1) = c.b[1];
|
| -#endif // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64
|
| + WriteUnalignedValue(p, value);
|
| +}
|
| +
|
| +static inline void WriteUnalignedUInt32(void* p, uint32_t value) {
|
| + WriteUnalignedValue(p, value);
|
| }
|
|
|
| } // namespace internal
|
|
|