OLD | NEW |
1 // Copyright 2012 the V8 project authors. All rights reserved. | 1 // Copyright 2012 the V8 project authors. All rights reserved. |
2 // Use of this source code is governed by a BSD-style license that can be | 2 // Use of this source code is governed by a BSD-style license that can be |
3 // found in the LICENSE file. | 3 // found in the LICENSE file. |
4 | 4 |
5 #ifndef V8_UTILS_H_ | 5 #ifndef V8_UTILS_H_ |
6 #define V8_UTILS_H_ | 6 #define V8_UTILS_H_ |
7 | 7 |
8 #include <limits.h> | 8 #include <limits.h> |
9 #include <stdlib.h> | 9 #include <stdlib.h> |
10 #include <string.h> | 10 #include <string.h> |
(...skipping 1697 matching lines...) Expand 10 before | Expand all | Expand 10 after Loading... |
1708 | 1708 |
1709 // Returns current value of top of the stack. Works correctly with ASAN. | 1709 // Returns current value of top of the stack. Works correctly with ASAN. |
1710 DISABLE_ASAN | 1710 DISABLE_ASAN |
1711 inline uintptr_t GetCurrentStackPosition() { | 1711 inline uintptr_t GetCurrentStackPosition() { |
1712 // Takes the address of the limit variable in order to find out where | 1712 // Takes the address of the limit variable in order to find out where |
1713 // the top of stack is right now. | 1713 // the top of stack is right now. |
1714 uintptr_t limit = reinterpret_cast<uintptr_t>(&limit); | 1714 uintptr_t limit = reinterpret_cast<uintptr_t>(&limit); |
1715 return limit; | 1715 return limit; |
1716 } | 1716 } |
1717 | 1717 |
| 1718 template <typename V> |
| 1719 static inline V ReadUnalignedValue(const void* p) { |
| 1720 #if !(V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64) |
| 1721 return *reinterpret_cast<const V*>(p); |
| 1722 #else |
| 1723 V r; |
| 1724 memmove(&r, p, sizeof(V)); |
| 1725 return r; |
| 1726 #endif // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
| 1727 } |
| 1728 |
| 1729 template <typename V> |
| 1730 static inline void WriteUnalignedValue(void* p, V value) { |
| 1731 #if !(V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64) |
| 1732 *(reinterpret_cast<V*>(p)) = value; |
| 1733 #else // V8_TARGET_ARCH_MIPS |
| 1734 memmove(p, &value, sizeof(V)); |
| 1735 #endif // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 |
| 1736 } |
| 1737 |
1718 static inline double ReadDoubleValue(const void* p) { | 1738 static inline double ReadDoubleValue(const void* p) { |
1719 #ifndef V8_TARGET_ARCH_MIPS | 1739 return ReadUnalignedValue<double>(p); |
1720 return *reinterpret_cast<const double*>(p); | |
1721 #else // V8_TARGET_ARCH_MIPS | |
1722 // Prevent compiler from using load-double (mips ldc1) on (possibly) | |
1723 // non-64-bit aligned address. | |
1724 union conversion { | |
1725 double d; | |
1726 uint32_t u[2]; | |
1727 } c; | |
1728 const uint32_t* ptr = reinterpret_cast<const uint32_t*>(p); | |
1729 c.u[0] = *ptr; | |
1730 c.u[1] = *(ptr + 1); | |
1731 return c.d; | |
1732 #endif // V8_TARGET_ARCH_MIPS | |
1733 } | 1740 } |
1734 | 1741 |
1735 | 1742 |
1736 static inline void WriteDoubleValue(void* p, double value) { | 1743 static inline void WriteDoubleValue(void* p, double value) { |
1737 #ifndef V8_TARGET_ARCH_MIPS | 1744 WriteUnalignedValue(p, value); |
1738 *(reinterpret_cast<double*>(p)) = value; | |
1739 #else // V8_TARGET_ARCH_MIPS | |
1740 // Prevent compiler from using load-double (mips sdc1) on (possibly) | |
1741 // non-64-bit aligned address. | |
1742 union conversion { | |
1743 double d; | |
1744 uint32_t u[2]; | |
1745 } c; | |
1746 c.d = value; | |
1747 uint32_t* ptr = reinterpret_cast<uint32_t*>(p); | |
1748 *ptr = c.u[0]; | |
1749 *(ptr + 1) = c.u[1]; | |
1750 #endif // V8_TARGET_ARCH_MIPS | |
1751 } | 1745 } |
1752 | 1746 |
1753 | 1747 |
1754 static inline uint16_t ReadUnalignedUInt16(const void* p) { | 1748 static inline uint16_t ReadUnalignedUInt16(const void* p) { |
1755 #if !(V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64) | 1749 return ReadUnalignedValue<uint16_t>(p); |
1756 return *reinterpret_cast<const uint16_t*>(p); | |
1757 #else // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 | |
1758 // Prevent compiler from using load-half (mips lh) on (possibly) | |
1759 // non-16-bit aligned address. | |
1760 union conversion { | |
1761 uint16_t h; | |
1762 uint8_t b[2]; | |
1763 } c; | |
1764 const uint8_t* ptr = reinterpret_cast<const uint8_t*>(p); | |
1765 c.b[0] = *ptr; | |
1766 c.b[1] = *(ptr + 1); | |
1767 return c.h; | |
1768 #endif // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 | |
1769 } | 1750 } |
1770 | 1751 |
1771 | 1752 |
1772 static inline void WriteUnalignedUInt16(void* p, uint16_t value) { | 1753 static inline void WriteUnalignedUInt16(void* p, uint16_t value) { |
1773 #if !(V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64) | 1754 WriteUnalignedValue(p, value); |
1774 *(reinterpret_cast<uint16_t*>(p)) = value; | 1755 } |
1775 #else // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 | 1756 |
1776 // Prevent compiler from using store-half (mips sh) on (possibly) | 1757 static inline void WriteUnalignedUInt32(void* p, uint32_t value) { |
1777 // non-16-bit aligned address. | 1758 WriteUnalignedValue(p, value); |
1778 union conversion { | |
1779 uint16_t h; | |
1780 uint8_t b[2]; | |
1781 } c; | |
1782 c.h = value; | |
1783 uint8_t* ptr = reinterpret_cast<uint8_t*>(p); | |
1784 *ptr = c.b[0]; | |
1785 *(ptr + 1) = c.b[1]; | |
1786 #endif // V8_TARGET_ARCH_MIPS || V8_TARGET_ARCH_MIPS64 | |
1787 } | 1759 } |
1788 | 1760 |
1789 } // namespace internal | 1761 } // namespace internal |
1790 } // namespace v8 | 1762 } // namespace v8 |
1791 | 1763 |
1792 #endif // V8_UTILS_H_ | 1764 #endif // V8_UTILS_H_ |
OLD | NEW |