Implements include/exclude register lists for translation.

src/IceTargetLoweringMIPS32.cpp

Index: src/IceTargetLoweringMIPS32.cpp
diff --git a/src/IceTargetLoweringMIPS32.cpp b/src/IceTargetLoweringMIPS32.cpp
index 57f79f6a59b270daaf3282b920f8afe85b9d153a..dc57bc755742d190c40414732b6790f917aa65ad 100644
--- a/src/IceTargetLoweringMIPS32.cpp
+++ b/src/IceTargetLoweringMIPS32.cpp
@@ -45,8 +45,8 @@ createTargetHeaderLowering(::Ice::GlobalContext *Ctx) {
   return ::Ice::MIPS32::TargetHeaderMIPS32::create(Ctx);
 }
 
-void staticInit(const ::Ice::ClFlags &Flags) {
-  ::Ice::MIPS32::TargetMIPS32::staticInit(Flags);
+void staticInit(::Ice::GlobalContext *Ctx) {
+  ::Ice::MIPS32::TargetMIPS32::staticInit(Ctx);
 }
 } // end of namespace MIPS32
 
@@ -64,8 +64,8 @@ constexpr uint32_t MIPS32_MAX_GPR_ARG = 4;
 
 TargetMIPS32::TargetMIPS32(Cfg *Func) : TargetLowering(Func) {}
 
-void TargetMIPS32::staticInit(const ClFlags &Flags) {
-  (void)Flags;
+void TargetMIPS32::staticInit(GlobalContext *Ctx) {
+  (void)Ctx;
   llvm::SmallBitVector IntegerRegisters(RegMIPS32::Reg_NUM);
   llvm::SmallBitVector I64PairRegisters(RegMIPS32::Reg_NUM);
   llvm::SmallBitVector Float32Registers(RegMIPS32::Reg_NUM);