Add VMULS and VMULD instructions to integrated ARM assembler.

tests_lit/assembler/arm32/vmul.ll

Index: tests_lit/assembler/arm32/vmul.ll
diff --git a/tests_lit/assembler/arm32/vadd.ll b/tests_lit/assembler/arm32/vmul.ll
similarity index 52%
copy from tests_lit/assembler/arm32/vadd.ll
copy to tests_lit/assembler/arm32/vmul.ll
index a03510340f949c626f54b901b93bcc0a4abb83cc..7d53279efdf0e585b197b859eed9082f571a6fb2 100644
--- a/tests_lit/assembler/arm32/vadd.ll
+++ b/tests_lit/assembler/arm32/vmul.ll
@@ -1,4 +1,4 @@
-; Show that we know how to translate vadd.
+; Show that we know how to translate vmul.
 
 ; NOTE: We use -O2 to get rid of memory stores.
 
@@ -20,44 +20,44 @@
 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
 ; RUN:   --args -O2 | FileCheck %s --check-prefix=DIS
 
-define internal float @testVaddFloat(float %v1, float %v2) {
-; ASM-LABEL: testVaddFloat:
-; DIS-LABEL: 00000000 <testVaddFloat>:
-; IASM-LABEL: testVaddFloat:
+define internal float @testVmulFloat(float %a, float %b) {
+; ASM-LABEL: testVmulFloat:
+; DIS-LABEL: 00000000 <testVmulFloat>:
+; IASM-LABEL: testVmulFloat:
 
 entry:
-; ASM-NEXT: .LtestVaddFloat$entry:
-; IASM-NEXT: .LtestVaddFloat$entry:
+; ASM-NEXT: .LtestVmulFloat$entry:
+; IASM-NEXT: .LtestVmulFloat$entry:
 
-  %res = fadd float %v1, %v2
+  %mul = fmul float %a, %b
 
-; ASM-NEXT:     vadd.f32        s0, s0, s1
-; DIS-NEXT:    0:       ee300a20
+; ASM-NEXT:    vmul.f32        s0, s0, s1
+; DIS-NEXT:    0:       ee200a20
 ; IASM-NEXT:    .byte 0x20
 ; IASM-NEXT:    .byte 0xa
-; IASM-NEXT:    .byte 0x30
+; IASM-NEXT:    .byte 0x20
 ; IASM-NEXT:    .byte 0xee
 
-  ret float %res
+  ret float %mul
 }
 
-define internal double @testVaddDouble(double %v1, double %v2) {
-; ASM-LABEL: testVaddDouble:
-; DIS-LABEL: 00000010 <testVaddDouble>:
-; IASM-LABEL: testVaddDouble:
+define internal double @testVmulDouble(double %a, double %b) {
+; ASM-LABEL: testVmulDouble:
+; DIS-LABEL: 00000010 <testVmulDouble>:
+; IASM-LABEL: testVmulDouble:
 
 entry:
-; ASM-NEXT: .LtestVaddDouble$entry:
-; IASM-NEXT: .LtestVaddDouble$entry:
+; ASM-NEXT: .LtestVmulDouble$entry:
+; IASM-NEXT: .LtestVmulDouble$entry:
 
-  %res = fadd double %v1, %v2
+  %mul = fmul double %a, %b
 
-; ASM-NEXT:     vadd.f64        d0, d0, d1
-; DIS-NEXT:   10:       ee300b01
+; ASM-NEXT:    vmul.f64        d0, d0, d1
+; DIS-NEXT:   10:       ee200b01
 ; IASM-NEXT:    .byte 0x1
 ; IASM-NEXT:    .byte 0xb
-; IASM-NEXT:    .byte 0x30
+; IASM-NEXT:    .byte 0x20
 ; IASM-NEXT:    .byte 0xee
 
-  ret double %res
+  ret double %mul
 }