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Side by Side Diff: tests_lit/assembler/arm32/vmul.ll

Issue 1570543002: Add VMULS and VMULD instructions to integrated ARM assembler. (Closed) Base URL: https://chromium.googlesource.com/native_client/pnacl-subzero.git@master
Patch Set: Show resolved merge conflicts. Created 4 years, 11 months ago
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1 ; Show that we know how to translate vadd. 1 ; Show that we know how to translate vmul.
2 2
3 ; NOTE: We use -O2 to get rid of memory stores. 3 ; NOTE: We use -O2 to get rid of memory stores.
4 4
5 ; REQUIRES: allow_dump 5 ; REQUIRES: allow_dump
6 6
7 ; Compile using standalone assembler. 7 ; Compile using standalone assembler.
8 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 \ 8 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --args -O2 \
9 ; RUN: | FileCheck %s --check-prefix=ASM 9 ; RUN: | FileCheck %s --check-prefix=ASM
10 10
11 ; Show bytes in assembled standalone code. 11 ; Show bytes in assembled standalone code.
12 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \ 12 ; RUN: %p2i --filetype=asm -i %s --target=arm32 --assemble --disassemble \
13 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS 13 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS
14 14
15 ; Compile using integrated assembler. 15 ; Compile using integrated assembler.
16 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \ 16 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --args -O2 \
17 ; RUN: | FileCheck %s --check-prefix=IASM 17 ; RUN: | FileCheck %s --check-prefix=IASM
18 18
19 ; Show bytes in assembled integrated code. 19 ; Show bytes in assembled integrated code.
20 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \ 20 ; RUN: %p2i --filetype=iasm -i %s --target=arm32 --assemble --disassemble \
21 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS 21 ; RUN: --args -O2 | FileCheck %s --check-prefix=DIS
22 22
23 define internal float @testVaddFloat(float %v1, float %v2) { 23 define internal float @testVmulFloat(float %a, float %b) {
24 ; ASM-LABEL: testVaddFloat: 24 ; ASM-LABEL: testVmulFloat:
25 ; DIS-LABEL: 00000000 <testVaddFloat>: 25 ; DIS-LABEL: 00000000 <testVmulFloat>:
26 ; IASM-LABEL: testVaddFloat: 26 ; IASM-LABEL: testVmulFloat:
27 27
28 entry: 28 entry:
29 ; ASM-NEXT: .LtestVaddFloat$entry: 29 ; ASM-NEXT: .LtestVmulFloat$entry:
30 ; IASM-NEXT: .LtestVaddFloat$entry: 30 ; IASM-NEXT: .LtestVmulFloat$entry:
31 31
32 %res = fadd float %v1, %v2 32 %mul = fmul float %a, %b
33 33
34 ; ASM-NEXT: vadd.f32 s0, s0, s1 34 ; ASM-NEXT: vmul.f32 s0, s0, s1
35 ; DIS-NEXT: 0: ee300a20 35 ; DIS-NEXT: 0: ee200a20
36 ; IASM-NEXT: .byte 0x20 36 ; IASM-NEXT: .byte 0x20
37 ; IASM-NEXT: .byte 0xa 37 ; IASM-NEXT: .byte 0xa
38 ; IASM-NEXT: .byte 0x30 38 ; IASM-NEXT: .byte 0x20
39 ; IASM-NEXT: .byte 0xee 39 ; IASM-NEXT: .byte 0xee
40 40
41 ret float %res 41 ret float %mul
42 } 42 }
43 43
44 define internal double @testVaddDouble(double %v1, double %v2) { 44 define internal double @testVmulDouble(double %a, double %b) {
45 ; ASM-LABEL: testVaddDouble: 45 ; ASM-LABEL: testVmulDouble:
46 ; DIS-LABEL: 00000010 <testVaddDouble>: 46 ; DIS-LABEL: 00000010 <testVmulDouble>:
47 ; IASM-LABEL: testVaddDouble: 47 ; IASM-LABEL: testVmulDouble:
48 48
49 entry: 49 entry:
50 ; ASM-NEXT: .LtestVaddDouble$entry: 50 ; ASM-NEXT: .LtestVmulDouble$entry:
51 ; IASM-NEXT: .LtestVaddDouble$entry: 51 ; IASM-NEXT: .LtestVmulDouble$entry:
52 52
53 %res = fadd double %v1, %v2 53 %mul = fmul double %a, %b
54 54
55 ; ASM-NEXT: vadd.f64 d0, d0, d1 55 ; ASM-NEXT: vmul.f64 d0, d0, d1
56 ; DIS-NEXT: 10: ee300b01 56 ; DIS-NEXT: 10: ee200b01
57 ; IASM-NEXT: .byte 0x1 57 ; IASM-NEXT: .byte 0x1
58 ; IASM-NEXT: .byte 0xb 58 ; IASM-NEXT: .byte 0xb
59 ; IASM-NEXT: .byte 0x30 59 ; IASM-NEXT: .byte 0x20
60 ; IASM-NEXT: .byte 0xee 60 ; IASM-NEXT: .byte 0xee
61 61
62 ret double %res 62 ret double %mul
63 } 63 }
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