Add vcvt<c>.f32.f64 and vcvt<c>.f64.32 to ARM.

src/DartARM32/assembler_arm.cc

Index: src/DartARM32/assembler_arm.cc
diff --git a/src/DartARM32/assembler_arm.cc b/src/DartARM32/assembler_arm.cc
index d51a9d3c886becbd7d4aaca76683864adc897459..990c08376e596bdfd6991c94027d43e6094e59b6 100644
--- a/src/DartARM32/assembler_arm.cc
+++ b/src/DartARM32/assembler_arm.cc
@@ -1069,7 +1069,8 @@ void Assembler::vsqrtd(DRegister dd, DRegister dm, Condition cond) {
   EmitVFPddd(cond, B23 | B21 | B20 | B16 | B7 | B6, dd, D0, dm);
 }
 
-
+#if 0
+// Moved to ARM32::AssemblerARM32::emitVFPsd
 void Assembler::EmitVFPsd(Condition cond, int32_t opcode,
                           SRegister sd, DRegister dm) {
   ASSERT(TargetCPUFeatures::vfp_supported());
@@ -1085,7 +1086,7 @@ void Assembler::EmitVFPsd(Condition cond, int32_t opcode,
   Emit(encoding);
 }
 
-
+// Moved to ARM32::AssemblerARM32::emitVFPds
 void Assembler::EmitVFPds(Condition cond, int32_t opcode,
                           DRegister dd, SRegister sm) {
   ASSERT(TargetCPUFeatures::vfp_supported());
@@ -1101,15 +1102,16 @@ void Assembler::EmitVFPds(Condition cond, int32_t opcode,
   Emit(encoding);
 }
 
-
+// Moved to ARM32::AssemblerARM32::vcvtsd().
 void Assembler::vcvtsd(SRegister sd, DRegister dm, Condition cond) {
   EmitVFPsd(cond, B23 | B21 | B20 | B18 | B17 | B16 | B8 | B7 | B6, sd, dm);
 }
 
-
+// Moved to ARM32::AssemblerARM32::vcvtds().
 void Assembler::vcvtds(DRegister dd, SRegister sm, Condition cond) {
   EmitVFPds(cond, B23 | B21 | B20 | B18 | B17 | B16 | B7 | B6, dd, sm);
 }
+#endif
 
 
 void Assembler::vcvtis(SRegister sd, SRegister sm, Condition cond) {