Add support for threading and atomic ops in QNX Neutrino.

base/atomicops_internals_arm_gcc.h

Index: base/atomicops_internals_arm_gcc.h
diff --git a/base/atomicops_internals_arm_gcc.h b/base/atomicops_internals_arm_gcc.h
index 9f4fe2e586e2425270ae2f57da0730bc6bcda8b8..7c3d51dca93e9b1c21f7287d3f1338a2e08e9d10 100644
--- a/base/atomicops_internals_arm_gcc.h
+++ b/base/atomicops_internals_arm_gcc.h
@@ -9,6 +9,10 @@
 #ifndef BASE_ATOMICOPS_INTERNALS_ARM_GCC_H_
 #define BASE_ATOMICOPS_INTERNALS_ARM_GCC_H_
 
+#if defined(OS_QNX)
+#include <sys/cpuinline.h>
+#endif
+
 namespace base {
 namespace subtle {
 
@@ -40,10 +44,15 @@ namespace subtle {
 //
 
 inline void MemoryBarrier() {
-  // Note: This is a function call, which is also an implicit compiler
-  // barrier.
+#if defined(OS_LINUX) || defined(OS_ANDROID)
+  // Note: This is a function call, which is also an implicit compiler barrier.
   typedef void (*KernelMemoryBarrierFunc)();
   ((KernelMemoryBarrierFunc)0xffff0fa0)();
+#elif defined(OS_QNX)
+  __cpu_membarrier();
+#else
+#error MemoryBarrier() is not implemented on this platform.
+#endif
 }
 
 // An ARM toolchain would only define one of these depending on which