Index: src/mips64/disasm-mips64.cc |
diff --git a/src/mips64/disasm-mips64.cc b/src/mips64/disasm-mips64.cc |
index 192f6cf8ee434de48dc3572857d1e47f22b93318..aa720d74a856c8b2861e1d91425eb686e625c933 100644 |
--- a/src/mips64/disasm-mips64.cc |
+++ b/src/mips64/disasm-mips64.cc |
@@ -75,6 +75,7 @@ class Decoder { |
void PrintFt(Instruction* instr); |
void PrintFd(Instruction* instr); |
void PrintSa(Instruction* instr); |
+ void PrintLsaSa(Instruction* instr); |
void PrintSd(Instruction* instr); |
void PrintSs1(Instruction* instr); |
void PrintSs2(Instruction* instr); |
@@ -227,6 +228,13 @@ void Decoder::PrintSa(Instruction* instr) { |
} |
+// Print the integer value of the sa field of a lsa instruction. |
+void Decoder::PrintLsaSa(Instruction* instr) { |
+ int sa = instr->LsaSaValue() + 1; |
+ out_buffer_pos_ += SNPrintF(out_buffer_ + out_buffer_pos_, "%d", sa); |
+} |
+ |
+ |
// Print the integer value of the rd field, when it is not used as reg. |
void Decoder::PrintSd(Instruction* instr) { |
int sd = instr->RdValue(); |
@@ -684,11 +692,17 @@ int Decoder::FormatOption(Instruction* instr, const char* format) { |
} |
case 's': { // 'sa. |
switch (format[1]) { |
- case 'a': { |
- DCHECK(STRING_STARTS_WITH(format, "sa")); |
- PrintSa(instr); |
- return 2; |
- } |
+ case 'a': |
+ if (format[2] == '2') { |
+ DCHECK(STRING_STARTS_WITH(format, "sa2")); // 'sa2 |
+ PrintLsaSa(instr); |
+ return 3; |
+ } else { |
+ DCHECK(STRING_STARTS_WITH(format, "sa")); |
+ PrintSa(instr); |
+ return 2; |
+ } |
+ break; |
case 'd': { |
DCHECK(STRING_STARTS_WITH(format, "sd")); |
PrintSd(instr); |
@@ -1198,6 +1212,12 @@ void Decoder::DecodeTypeRegisterSPECIAL(Instruction* instr) { |
case DSRAV: |
Format(instr, "dsrav 'rd, 'rt, 'rs"); |
break; |
+ case LSA: |
+ Format(instr, "lsa 'rd, 'rt, 'rs, 'sa2"); |
+ break; |
+ case DLSA: |
+ Format(instr, "dlsa 'rd, 'rt, 'rs, 'sa2"); |
+ break; |
case MFHI: |
if (instr->Bits(25, 16) == 0) { |
Format(instr, "mfhi 'rd"); |