Add VADD instruction to the ARM integrated assembler.

src/IceRegistersARM32.h

Index: src/IceRegistersARM32.h
diff --git a/src/IceRegistersARM32.h b/src/IceRegistersARM32.h
index 0caa9ccdf4e225ccfd0e40bcd6838c36bbb4011b..46cf2efa2bc05b169963da29db2b7fd312a73e67 100644
--- a/src/IceRegistersARM32.h
+++ b/src/IceRegistersARM32.h
@@ -146,29 +146,41 @@ public:
 #undef X
   };
 
-  static inline GPRRegister getEncodedGPR(int32_t RegNum) {
-    assert(Reg_GPR_First <= RegNum);
-    assert(RegNum <= Reg_GPR_Last);
+  static inline bool isRegisterDefined(int32_t RegNum) {

[Jim Stichnoth, 2016/01/06 18:39:14]

This function bothers me (perhaps more than it should).

In the rest of the code base (specifically thinking of lowering, register
allocation, and x86 emission), the int32_t RegNum is gotten from
Variable::getRegNum(), perhaps guarded by Variable::hasReg() or
Variable::NoRegister.  Then the emitter just uses it without any test like this
isRegisterDefined().  That makes me think that maybe there is something special
and deeper about register numbers in ARM.

But that's not true, I think.  It looks like the only use of isRegisterDefined()
is to assert that it is true.

To make that more clear, I would change this to something like:

static inline void assertRegisterDefined(int32_t RegNum) {
  assert(RegNum >= 0 && RegNum < Reg_NUM);
}

[Karl, 2016/01/07 00:00:35]

I agree that the check is an assertion, since enums GPRRegister, SRegister,
DRegister, and QRegister define an "Encoded_Not_... = -1" value. Fixing to use
assert in name.

+    return RegNum >= 0 && RegNum < Reg_NUM;
+  }
+
+  static inline bool isGPRegister(int32_t RegNum) {
+    assert(isRegisterDefined(RegNum));
+    return Table[RegNum].IsGPR;
+  }
+
+  static inline SizeT getNumGPRegs() {

[Jim Stichnoth, 2016/01/06 18:39:14]

Can these getNumRegs() functions be defined as constexpr?

[Karl, 2016/01/07 00:00:35]

Done.

+    return Reg_GPR_Last + 1 - Reg_GPR_First;
+  }
+
+  static inline GPRRegister getEncodedGPReg(int32_t RegNum) {
+    assert(isGPRegister(RegNum));
     return GPRRegister(Table[RegNum].Encoding);
   }
 
   static inline GPRRegister getI64PairFirstGPRNum(int32_t RegNum) {
-    assert(Reg_I64PAIR_First <= RegNum);
-    assert(RegNum <= Reg_I64PAIR_Last);
+    assert(isI64RegisterPair(RegNum));
     return GPRRegister(Table[RegNum].Encoding);
   }
 
   static inline GPRRegister getI64PairSecondGPRNum(int32_t RegNum) {
-    assert(Reg_I64PAIR_First <= RegNum);
-    assert(RegNum <= Reg_I64PAIR_Last);
+    assert(isI64RegisterPair(RegNum));
     return GPRRegister(Table[RegNum].Encoding + 1);
   }
 
   static inline bool isI64RegisterPair(int32_t RegNum) {
+    assert(isRegisterDefined(RegNum));
     return Table[RegNum].IsI64Pair;
   }
 
   static inline bool isEncodedSReg(int32_t RegNum) {
+    assert(isRegisterDefined(RegNum));
     return Table[RegNum].IsFP32;
   }
 
@@ -177,25 +189,38 @@ public:
   }
 
   static inline SRegister getEncodedSReg(int32_t RegNum) {
-    assert(Reg_SREG_First <= RegNum);
-    assert(RegNum <= Reg_SREG_Last);
+    assert(isEncodedSReg(RegNum));
     return SRegister(Table[RegNum].Encoding);
   }
 
+  // Note: D registers are listed from largest to smallest.

[Jim Stichnoth, 2016/01/06 18:39:14]

Move this down to getNumDRegs(), assuming it's still relevant with respect to
the CL comment above.

[Karl, 2016/01/07 00:00:35]

Removed. No longer applicable.

+
+  static inline bool isEncodedDReg(int32_t RegNum) {
+    assert(isRegisterDefined(RegNum));
+    return Table[RegNum].IsFP64;
+  }
+
+  static inline SizeT getNumDRegs() {
+    return Reg_DREG_First + 1 - Reg_DREG_Last;
+  }
+
   static inline DRegister getEncodedDReg(int32_t RegNum) {
-    assert(Reg_DREG_First <= RegNum);
-    assert(RegNum <= Reg_DREG_Last);
+    assert(isEncodedDReg(RegNum));
     return DRegister(Table[RegNum].Encoding);
   }
 
+  static inline bool isEncodedQReg(int32_t RegNum) {
+    assert(isRegisterDefined(RegNum));
+    return Table[RegNum].IsVec128;
+  }
+
   static inline QRegister getEncodedQReg(int32_t RegNum) {
-    assert(Reg_QREG_First <= RegNum);
-    assert(RegNum <= Reg_QREG_Last);
+    assert(isEncodedQReg(RegNum));
     return QRegister(Table[RegNum].Encoding);
   }
 
-  static inline IceString getRegName(SizeT RegNum) {
-    assert(RegNum < Reg_NUM);
+  static inline IceString getRegName(int32_t RegNum) {
+    assert(isRegisterDefined(RegNum));
     return Table[RegNum].Name;
   }
 };