Index: src/IceInstX86BaseImpl.h |
diff --git a/src/IceInstX86BaseImpl.h b/src/IceInstX86BaseImpl.h |
index c94356014e57d6c011cb0830ac6f08ab504e330e..19e4b86a5f37da5b8dcda0dfd3c711090c617f4b 100644 |
--- a/src/IceInstX86BaseImpl.h |
+++ b/src/IceInstX86BaseImpl.h |
@@ -198,8 +198,9 @@ InstX86Cmpxchg<Machine>::InstX86Cmpxchg(Cfg *Func, Operand *DestOrAddr, |
: InstX86BaseLockable<Machine>(Func, InstX86Base<Machine>::Cmpxchg, 3, |
llvm::dyn_cast<Variable>(DestOrAddr), |
Locked) { |
- assert(InstX86Base<Machine>::Traits::getBaseReg(Eax->getRegNum()) == |
- InstX86Base<Machine>::Traits::RegisterSet::Reg_eax); |
+ constexpr uint16_t Encoded_rAX = 0; |
Jim Stichnoth
2015/12/20 19:27:37
It seems odd to capitalize AX here.
Also, don't y
John
2015/12/21 13:41:31
that's x86 nomenclature for a register than could
|
+ assert(InstX86Base<Machine>::Traits::getEncodedGPR(Eax->getRegNum()) == |
+ Encoded_rAX); |
this->addSource(DestOrAddr); |
this->addSource(Eax); |
this->addSource(Desired); |
@@ -1509,7 +1510,7 @@ void InstX86Cbwdq<Machine>::emitIAS(const Cfg *Func) const { |
Asm->cdq(); |
break; |
case IceType_i64: |
- assert(DestReg == InstX86Base<Machine>::Traits::RegisterSet::Reg_edx); |
+ // assert(DestReg == InstX86Base<Machine>::Traits::RegisterSet::Reg_edx); |
Jim Stichnoth
2015/12/20 19:27:37
There should be *some* assert here, right?
John
2015/12/21 13:41:31
Yes and no. These asserts should be in the constru
|
Asm->cqo(); |
break; |
} |
@@ -2468,49 +2469,58 @@ void InstX86Movd<Machine>::emitIAS(const Cfg *Func) const { |
Func->getAssembler<typename InstX86Base<Machine>::Traits::Assembler>(); |
assert(this->getSrcSize() == 1); |
const Variable *Dest = this->getDest(); |
- const auto *SrcVar = llvm::cast<Variable>(this->getSrc(0)); |
auto *Target = InstX86Base<Machine>::getTarget(Func); |
// For insert/extract element (one of Src/Dest is an Xmm vector and the other |
// is an int type). |
- if (SrcVar->getType() == IceType_i32 || |
- (InstX86Base<Machine>::Traits::Is64Bit && |
- SrcVar->getType() == IceType_i64)) { |
- assert(isVectorType(Dest->getType()) || |
- (isScalarFloatingType(Dest->getType()) && |
- typeWidthInBytes(SrcVar->getType()) == |
- typeWidthInBytes(Dest->getType()))); |
- assert(Dest->hasReg()); |
- typename InstX86Base<Machine>::Traits::RegisterSet::XmmRegister DestReg = |
- InstX86Base<Machine>::Traits::getEncodedXmm(Dest->getRegNum()); |
- if (SrcVar->hasReg()) { |
- Asm->movd( |
- SrcVar->getType(), DestReg, |
- InstX86Base<Machine>::Traits::getEncodedGPR(SrcVar->getRegNum())); |
+ if (const auto *SrcVar = llvm::dyn_cast<Variable>(this->getSrc(0))) { |
+ if (SrcVar->getType() == IceType_i32 || |
+ (InstX86Base<Machine>::Traits::Is64Bit && |
+ SrcVar->getType() == IceType_i64)) { |
+ assert(isVectorType(Dest->getType()) || |
+ (isScalarFloatingType(Dest->getType()) && |
+ typeWidthInBytes(SrcVar->getType()) == |
+ typeWidthInBytes(Dest->getType()))); |
+ assert(Dest->hasReg()); |
+ typename InstX86Base<Machine>::Traits::RegisterSet::XmmRegister DestReg = |
+ InstX86Base<Machine>::Traits::getEncodedXmm(Dest->getRegNum()); |
+ if (SrcVar->hasReg()) { |
+ Asm->movd( |
+ SrcVar->getType(), DestReg, |
+ InstX86Base<Machine>::Traits::getEncodedGPR(SrcVar->getRegNum())); |
+ } else { |
+ typename InstX86Base<Machine>::Traits::Address StackAddr( |
+ Target->stackVarToAsmOperand(SrcVar)); |
+ Asm->movd(SrcVar->getType(), DestReg, StackAddr); |
+ } |
} else { |
- typename InstX86Base<Machine>::Traits::Address StackAddr( |
- Target->stackVarToAsmOperand(SrcVar)); |
- Asm->movd(SrcVar->getType(), DestReg, StackAddr); |
+ assert(isVectorType(SrcVar->getType()) || |
+ (isScalarFloatingType(SrcVar->getType()) && |
+ typeWidthInBytes(SrcVar->getType()) == |
+ typeWidthInBytes(Dest->getType()))); |
+ assert(SrcVar->hasReg()); |
+ assert(Dest->getType() == IceType_i32 || |
+ (InstX86Base<Machine>::Traits::Is64Bit && |
+ Dest->getType() == IceType_i64)); |
+ typename InstX86Base<Machine>::Traits::RegisterSet::XmmRegister SrcReg = |
+ InstX86Base<Machine>::Traits::getEncodedXmm(SrcVar->getRegNum()); |
+ if (Dest->hasReg()) { |
+ Asm->movd(Dest->getType(), InstX86Base<Machine>::Traits::getEncodedGPR( |
+ Dest->getRegNum()), |
+ SrcReg); |
+ } else { |
+ typename InstX86Base<Machine>::Traits::Address StackAddr( |
+ Target->stackVarToAsmOperand(Dest)); |
+ Asm->movd(Dest->getType(), StackAddr, SrcReg); |
+ } |
} |
} else { |
- assert(isVectorType(SrcVar->getType()) || |
- (isScalarFloatingType(SrcVar->getType()) && |
- typeWidthInBytes(SrcVar->getType()) == |
- typeWidthInBytes(Dest->getType()))); |
- assert(SrcVar->hasReg()); |
- assert(Dest->getType() == IceType_i32 || |
- (InstX86Base<Machine>::Traits::Is64Bit && |
- Dest->getType() == IceType_i64)); |
- typename InstX86Base<Machine>::Traits::RegisterSet::XmmRegister SrcReg = |
- InstX86Base<Machine>::Traits::getEncodedXmm(SrcVar->getRegNum()); |
- if (Dest->hasReg()) { |
- Asm->movd(Dest->getType(), |
- InstX86Base<Machine>::Traits::getEncodedGPR(Dest->getRegNum()), |
- SrcReg); |
- } else { |
- typename InstX86Base<Machine>::Traits::Address StackAddr( |
- Target->stackVarToAsmOperand(Dest)); |
- Asm->movd(Dest->getType(), StackAddr, SrcReg); |
- } |
+ assert(Dest->hasReg()); |
+ typename InstX86Base<Machine>::Traits::RegisterSet::XmmRegister DestReg = |
+ InstX86Base<Machine>::Traits::getEncodedXmm(Dest->getRegNum()); |
+ auto *Mem = |
+ llvm::cast<typename InstX86Base<Machine>::Traits::X86OperandMem>( |
+ this->getSrc(0)); |
+ Asm->movd(Mem->getType(), DestReg, Mem->toAsmAddress(Asm, Target)); |
} |
} |