| Index: src/IceAssemblerARM32.h
|
| diff --git a/src/IceAssemblerARM32.h b/src/IceAssemblerARM32.h
|
| index 6625b0d52e78de2716194b3d19c8dab024721a04..0d1272db5c20b69d37296f7e1fd76fa04ecfe0ef 100644
|
| --- a/src/IceAssemblerARM32.h
|
| +++ b/src/IceAssemblerARM32.h
|
| @@ -313,6 +313,12 @@ public:
|
| // Implements uxtb/uxth depending on type of OpSrc0.
|
| void uxt(const Operand *OpRd, const Operand *OpSrc0, CondARM32::Cond Cond);
|
|
|
| + void vpop(const Variable *OpBaseReg, SizeT NumConsecRegs,
|
| + CondARM32::Cond Cond);
|
| +
|
| + void vpush(const Variable *OpBaseReg, SizeT NumConsecRegs,
|
| + CondARM32::Cond Cond);
|
| +
|
| static bool classof(const Assembler *Asm) {
|
| return Asm->getKind() == Asm_ARM32;
|
| }
|
| @@ -404,6 +410,12 @@ private:
|
| bool IsLoad, IValueT BaseReg, IValueT Registers,
|
| const char *InstName);
|
|
|
| + // Pattern ccccxxxxxDxxxxxxddddxxxxiiiiiiii where cccc=Cond, ddddD=BaseReg,
|
| + // iiiiiiii=NumConsecRegs, and xxxxx0xxxxxx0000xxxx00000000=Opcode.
|
| + void emitVStackOp(CondARM32::Cond Cond, IValueT Opcode,
|
| + const Variable *OpBaseReg, SizeT NumConsecRegs,
|
| + const char *InstName);
|
| +
|
| // Pattern cccc011100x1dddd1111mmmm0001nnn where cccc=Cond,
|
| // x=Opcode, dddd=Rd, nnnn=Rn, mmmm=Rm.
|
| void emitDivOp(CondARM32::Cond Cond, IValueT Opcode, IValueT Rd, IValueT Rn,
|
|
|