Index: src/IceTargetLoweringX8664.cpp |
diff --git a/src/IceTargetLoweringX8664.cpp b/src/IceTargetLoweringX8664.cpp |
index 6844d4adc4359606f99414424b80633d2a9bf478..8aea38387286c08764bdaf40142a18c7a6c12619 100644 |
--- a/src/IceTargetLoweringX8664.cpp |
+++ b/src/IceTargetLoweringX8664.cpp |
@@ -367,7 +367,14 @@ void TargetX8664::lowerRet(const InstRet *Inst) { |
Reg = legalizeToReg(Src0, Traits::RegisterSet::Reg_xmm0); |
} else { |
assert(isScalarIntegerType(Src0->getType())); |
- _mov(Reg, Src0, Traits::RegisterSet::Reg_eax); |
+ if (Src0->getType() == IceType_i8) { |
Jim Stichnoth
2015/12/20 18:42:23
Same comment as in x86-32 - handle IceType_i1 as w
sehr
2016/01/07 18:53:11
Done.
|
+ // TODO(sehr,stichnot): I think these need to sign/zero extend. |
+ _mov(Reg, Src0, Traits::RegisterSet::Reg_al); |
+ } else if (Src0->getType() == IceType_i16) { |
+ _mov(Reg, Src0, Traits::RegisterSet::Reg_ax); |
+ } else { |
+ _mov(Reg, Src0, Traits::RegisterSet::Reg_eax); |
Jim Stichnoth
2015/12/20 18:42:23
You probably need to deal with i32/eax and i64/rax
sehr
2016/01/07 18:53:11
John beat me to the punch. It should work there a
|
+ } |
} |
} |
// Add a ret instruction even if sandboxing is enabled, because addEpilog |